
Interrupts
Specifications in this manual are tentative and subject to change
Rev. E
MITSUBISHI MICROCOMPUTERS
M30245 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
62
Interrupt request cause select register
Bit name
Function
Bit symbol
W
R
Symbol
Address
When reset
IFSR
035F16
0016
IFSR0
b7
b6
b5
b4
b3
b2
b1
b0
INT0 interrupt polarity
swiching bit
0 : One edge
1 : Two edges
0 :
1 :
0 :
1 :
Nothing is assigned.
Write "0" when writing to these bits. The value is indeterminate when read.
INT1 interrupt polarity
swiching bit
INT2 interrupt polarity
swiching bit
IFSR1
IFSR2
IFSR6
IFSR7
0 :
1 :
0 :
1 :
Two edges
UART2 Bus collision
UART3 Bus collision
One edge
UART0 Bus collision
UART1 Bus collision
Bus collision interrupt request
cause select bit 0
Bus collision interrupt request
cause select bit 1
INT interrupt
INT0 to INT2 are triggered by the edges of external inputs. The edge polarity is selected using the polarity
select bit in the interrupt control register (004416, 005E16, 005F16) and the polarity switching bit in the
interrupt request cause select register (035F16).
For an external interrupt input, an interrupt can be generated both at the rising edge and at the falling edge
by setting “1” in the INTi interrupt polarity switching bit of the interrupt request cause select register
(035F16). To select one edge, set the polarity switching bit of the corresponding interrupt request cause
select register to ‘one edge’ (“0”), and set the polarity select bit in the interrupt control register to rising
edge or falling edge.
Figure 1.36 shows the interrupt request cause select register.
Figure 1.36.
Interrupt request cause select register.
NMI Interrupt
An NMI interrupt is generated when the input to the P85/NMI pin changes from “H” to “L”. The NMI interrupt
is a non-maskable external interrupt. The pin level can be checked in the Port P85 register (bit 5 at address
03F016). This pin cannot be used as a normal port input.
Notes:
When not intending to use the NMI function, be sure to connect the NMI pin to Vcc. Because the NMI
interrupt is non-maskable, it cannot be disabled.
When the NMI pin input is “L”, do not set the microcomputer in stop mode or wait mode. The NMI interrupt
is triggered by the falling edge, so the “L” level does not need to be maintained longer than necessary.
Key-Input Interrupt
A Key input interrupt can be generated by a falling edge, rising edge or both edges input to any Port 10
pin. It can also be used as a Key-on wake up function for canceling the wait mode or stop mode. Figure
1.37 shows the block diagram of the Key-input interrupt.
Figure 1.38 shows the Key-input mode register. It is possible to select both edges or the falling edge of the
Key input interrupt for P10 with bits 0 and 1 of this register. This register is also used to enable or disable
Port 10 pins that are to be used for Key-input interrupts. Port 10 can be configured with pull-up resistors
using the pull-up control resistor.