
Serial Communication
Specifications in this manual are tentative and subject to change
Rev. E
MITSUBISHI MICROCOMPUTERS
M30245 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
132
Clock synchronous serial I/O mode
The clock synchronous serial I/O mode uses a transfer clock to transmit and receive data. Table 1.44 list
the specifications of the clock synchronous serial I/O mode.
Table 1.44. Clock synchronous serial I/O mode specifications
Note 1: "m" denotes the value 0016 to FF16 that is set in the UART bit rate generator.
Note 2: If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note
also that the UARTi receive interrupt request bit will not change.
Item
Specification
Transfer data format
Transfer data length: 8-bits
Transfer clock
When internal clock is selected (bit 3 at address 03A816, 036816, 033816, 032816 ="0"):
fi/2(m+1) (Note 1)
fi = f1, f8, f32
When external clock is selected (bit 3 at 03A816, 036816, 033816, 032816 = "1"):
Input from CLKi pin
Transfer/receive control
CTS function/RTS function/CTS, RTS function not used
Transfer start condition
To start transfer, the following criteria must be met:
-Transmit enable bit (bit 0 at 03AD16, 036D16, 033D16, 032D16) = "1"
-Transmit buffer empty flag (bit 1 at 03AD16, 036D16, 033D16, 032D16) = "0"
-When CTS function selected, CTS input level = "L"
Furthermore, if external clock is selected, the following requirements must also be met:
-CLKi polarity select bit (bit 6 at 03AC16, 036C16, 033C16, 032C16)="0": CLKi input level = "H"
-CLKi polarity select bit (bit 6 at 03AC16, 036C16, 033C16, 032C16)="1": CLKi input level = "L"
Receive start condition
To start reception, the following requirement must be met:
-Receive enable bit (bit 2 at 03AD16, 036D16, 033D16, 032D16) = "1"
-Transmit enable bit (bit 0 at 03AD16, 036D16, 033D16, 032D16) = "1"
-Transmit buffer empty flag (bit 1 at 03AD16, 036D16, 033D16, 032D16) = "0"
Furthermore, if external clock is selected, the following requirement must be met:
-CLKi polarity select bit (bit 6 at 03AC16, 036C16, 033C16, 032C16)="0": CLKi input level = "H"
-CLKi polarity select bit (bit 6 at 03AC16, 036C16, 033C16, 032C16)="1": CLKi input level = "L"
Interrupt request generation
timing
When transmitting:
-Transmit interrupt cause select bit (bit 4 at 3AD16, 036D16, 033D16, 032D16) = "0": Interrupt requested
when data transfer from UARTi transfer buffer register to UARTi transmit register is complete
-Transmit interrupt cause select bit (bit 4 at 3AD16, 036D16, 033D16, 032D16) = "1": Interrupt requested
when data transmission from UARTi transmit register is complete
When receiving:
-Interrupt requested when data transfer from UARTi receive register to UARTi receive buffer register is
completed.
Error detection
Overrun error (Note 2)
This error occurs when the next data is ready before contents of UARTi receive buffer register are
read out
Select function
CLK polarity selection
Whether transmit data is output/input at the rising edge or falling edge or the transfer clock can be
selected
LSB first/MSB first selection
Whether transmission/reception begins with bit 0 or bit 7 can be selected
Continuous receive mode selection
Reception is enabled simultaneously by a read form the receive buffer register
Switching serial data log
Reverse data when writing to the transmission buffer register or reading the reception buffer register
can selected
TxD, RxD, I/O polarity reverse
This function reverses the TxD port output and RxD port input. All I/O data level is reversed.