參數(shù)資料
型號: M30240MC-XXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, MICROCONTROLLER, PQFP80
封裝: 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 59/125頁
文件大?。?/td> 753K
代理商: M30240MC-XXXFP
Mitsubishi microcomputers
M16C / 24 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
41
CONFIDENTIAL
Preliminary Specifications REV.B
Specifications in this manual are tentative and subject to change
Frequency Synthesizer Circuit
2.17 Frequency Synthesizer Circuit
The Frequency Synthesizer Circuit generates a 48MHz clock needed by the USB block and a clock fSYN
that are both a multiple of the external input reference clock fIN. A block diagram of the circuit is shown
in Figure 23.
Figure 23:
Frequency Synthesizer Circuit
The frequency synthesizer consists of a prescaler, frequency multiplier macro, a frequency divider
macro, and five registers, namely FSP, FSM, FSC, FSD, and FSCCR. Clock fIN is prescaled down using
FSP to generate fPIN.fPIN is multiplied using FSM to generate an fVCO clock which is then divided using
FSD to produce the clock fSYN. The fVCO clock is optimized for 48 MHz operation and is buffered and
sent out of the frequency synthesizer block as signal fUSB. This signal is used by the USB block.
(1) Prescaler
Clock fPIN is a divided down version of clock fIN (see Figure 24). The relationship between fPIN and the
clock input to the prescaler (fIN) is as follows:
fPIN = fIN / 2(n+1) where n is a decimal number between 0 and 254.
Setting FSP to 255 disables the prescaler and fPIN = fIN.
Figure 24:
Frequency Synthesizer Prescaler Register (FSP)
FSP
Data Bus
FSM
FSC
FSD
03DE
03DD
03DC
03DF
Frequency
Multiplier
Frequency
Divider
8
Bit
LS
8 Bit
fIN
fVCO
fSYN
fUSB
Prescaler
8
Bit
fPIN
FSCCR
FSCCR0
03DB
fIN/2(n+1)=fPIN
fPIN
FSP
fIN
Dec(n)
Hex(n)
12 MHz
255
FF
12.00 MHz
1 MHz
5
05
12.00 MHz
2 MHz
2
02
12.00 MHz
3 MHz
1
01
12.00 MHz
6 MHz
0
00
12.00 MHz
MSB
7
LSB
0
Bit 6
Bit 1
Bit 0
Bit 2
Bit 5
Bit 4
Bit 3
Bit 7
Access: R/W
Address: 03DE16
Reset:
FF16
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