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參數(shù)資料
| 型號： | M13S128324A-6BG |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Modify typing error of Pin Arrangement |
| 中文描述： | 修改輸入錯誤的管腳配置 |
| 文件頁數(shù)： | 31/48頁 |
| 文件大?。?/td> | 803K |
| 代理商： | M13S128324A-6BG |
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ES MT
M13S128324A
Elite Semiconductor Memory Technology Inc.
Publication Date : Mar. 2006
Revision : 1.0 31/48
Current State
CS
RAS CAS
WE
Address
Command
Action
H
X
X
X
X
DESEL
NOP (Idle after t
RP
)
L
H
H
H
X
NOP
NOP (Idle after t
RP
)
L
H
H
L
BA
Burst Stop
ILLEGAL
L
H
L
X
BA, CA, A8
READ/WRITE
ILLEGAL
L
L
H
H
BA, RA
Active
ILLEGAL
L
L
H
L
BA, A8
PRE / PREA
ILLEGAL
L
L
L
H
X
Refresh
ILLEGAL
RE-FRESHING
L
L
L
L
Op-Code Mode-Add
MRS
ILLEGAL
H
X
X
X
X
DESEL
NOP (Idle after t
RP
)
L
H
H
H
X
NOP
NOP (Idle after t
RP
)
L
H
H
L
BA
Burst Stop
ILLEGAL
L
H
L
X
BA, CA, A8
READ / WRITE
ILLEGAL
L
L
H
H
BA, RA
Active
ILLEGAL
L
L
H
L
BA, A8
PRE / PREA
ILLEGAL
L
L
L
H
X
Refresh
ILLEGAL
MODE
REGISTER
SETTING
L
L
L
L
Op-Code Mode-Add
MRS
ILLEGAL
ABBREVIATIONS :
H = High Level, L = Low level, V = Valid, X = Don’t Care
BA = Bank Address, RA =Row Address, CA = Column Address, NOP = No Operation
Note :
1. All entries assume that CKE was High during the preceding clock cycle and the current clock cycle.
2. ILLEGAL to bank in specified state; function may be legal in the bank indicated by BA, depending on the state of the
bank.
3. Must satisfy bus contention, bus turn around and write recovery requirements.
4. NOP to bank precharging or in idle state. May precharge bank indicated by BA.
5. ILLEGAL of any bank is not idle.
6. Same bank’s previous auto precharg will not be performed. But if the bank is different, previous auto precharge will be
performed.
7. Refer to “Read with Auto Precharge: for more detailed information.
ILLEGAL = Device operation and / or data integrity are not guaranteed.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M13S128324A-6BIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S128324A-6LG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S128324A-6LIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S2561616A | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:4M x 16 Bit x 4 Banks Double Data Rate SDRAM |
| M13S2561616A_09 | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:4M x 16 Bit x 4 Banks Double Data Rate SDRAM |
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