參數(shù)資料
型號(hào)： M13S128324A-6BG
廠商： Electronic Theatre Controls, Inc.
英文描述： Modify typing error of Pin Arrangement
中文描述： 修改輸入錯(cuò)誤的管腳配置
文件頁數(shù)： 25/48頁
文件大小： 803K
代理商： M13S128324A-6BG
ES MT
M13S128324A
Elite Semiconductor Memory Technology Inc.
Publication Date : Mar. 2006
Revision : 1.0 25/48
Read With Auto Precharge
If a read with auto-precharge command is initiated, the DDR SDRAM automatically enters the precharge operation BL/2 clock
later from a read with auto-precharge command when t
RAS
(min) is satisfied. If not, the start point of precharge operation will be
delayed until t
RAS
(min) is satisfied. Once the precharge operation has started the bank cannot be reactivated and the new
command can not be asserted until the precharge time (t
RP
) has been satisfied
<Burst Length = 4, CAS Latency = 3>
0
1
2
CL K
C LK
3
4
5
6
7
8
COMMAND
B a nk A
NOP
NOP
NOP
NOP
NOP
NOP
NOP
R ea d A
Auto Pre cha rg e
CA S Lat en cy = 3
DQS
DQ's
Dout 0 Dout 1 Dout 2 Dout 3
t
R AP
At burst read / write with auto precharge, CAS interrupt of the same bank is illegal.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M13S128324A-6BIG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM
M13S128324A-6LG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM
M13S128324A-6LIG 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM
M13S2561616A 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:4M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S2561616A_09 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:4M x 16 Bit x 4 Banks Double Data Rate SDRAM
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