參數(shù)資料
型號(hào): M12L16161A
廠商: Electronic Theatre Controls, Inc.
英文描述: 512K x 16Bit x 2Banks Synchronous DRAM
中文描述: 為512k × 16Bit的X 2Banks同步DRAM
文件頁數(shù): 26/27頁
文件大?。?/td> 566K
代理商: M12L16161A
M12L16161A
Elite Semiconductor Memory Technology Inc.
P.
26
Publication Date : J an. 2000
Revision : 1.3u
Mode Register Set Cycle Auto Refresh Cycle
*Both banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.
MODE REGISTER SET CYCLE
*Note: 1.CS ,RAS,CAS&WE activation at the same clock cycle with address key will set internal mode register.
2.Minimum 2 clock cycles should be met before new RAS activation.
3.Please refer to Mode Register Set table.
C L O C K
C K E
A D D R
Key
: D on 't C a r e
H IG H
C S
R A S
C A S
H IG H
*Not e3
R a
*Not e1
DQ
H i- Z
D QM
1 2 3 4 5 6 0 1 2 3 4 5 6 7 8 9 1 0
H i- Z
*Not e2
t
R F C
MR S
New C om m a n d
A u t o R efres h
New C om m a n d
W E
0
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