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參數(shù)資料
| 型號(hào)： | LXP730LE |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 11/70頁 |
| 文件大?。?/td> | 1007K |
| 代理商： | LXP730LE |
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Multi-Rate DSL Framer
—
LXP730
Datasheet
11
Table 1. LXP730 Pin Descriptions
Pin
Symbol
Type
1
Description
1, 9, 16,
33, 48
VCC
_
Power Supply.
10, 17,
32, 49,
64
GND
_
Ground.
28
DATA0/
CRC_ERROR
DI/O, DO
DATA0.
MPC mode/
CRC_ERROR.
flag HWC mode, indicates an error was detected
in the previous frame.
29
DATA1/FEBE
DI/O, DO
DATA1.
MPC mode/
FEBE.
flag HWC mode, indicates the other side of the DSL link
encountered a CRC error.
30
DATA2/
LINK_ACTIVE
DI/O, DO
DATA2.
MPC mode/
LINK_ACTIVE.
HWC mode, indicates that the DSL link is active
and ready to transport data.
31
DATA3/RUN-
STOP
DI/O, DI
DATA3.
MPC mode/
RUN-STOP.
HWC mode, set to low to activate the DSL link,
edge triggered input.
34
DATA4/
FRMSYNC15
DI/O, DO
DATA4.
MPC mode /
FRMSYNC15.
HWC mode, Frame Sync Pulse, channel 15.
35
DATA5/
FRMSYNC16
DI/O, DO
DATA5.
MPC mode /
FRMSYNC16.
HWC mode. Frame Sync Pulse, channel 16.
36
DATA6/
FRMSYNC17
DI/O, DO
DATA6.
MPC mode /
FRMSYNC17.
HWC mode. Frame Sync Pulse, channel 17.
37
DATA7/
FRMSYNC18
DI/O, DO
DATA7.
MPC mode /
FRMSYNC18.
HWC mode. Frame Sync Pulse, channel 17.
22
ADDR0/
FRMSYNC13
DI, DO
ADDR0.
MPC mode/
FRMSYNC13.
HWC mode. Frame Sync Pulse, channel 13,
output.
23
ADDR1/N1
DI
ADDR1.
MPC mode/
N1.
DSL rate select, HWC mode.
24
ADDR2/N2
DI
ADDR2.
MPC mode/
N2.
DSL rate select, HWC mode.
25
ADDR3/N3
DI
ADDR3.
MPC mode/
N3.
DSL rate select, HWC mode.
26
ADDR4/N4
DI
ADDR4.
MPC mode/
N4.
DSL rate select, HWC mode.
27
ADDR5/
FRMSYNC14
DI, DO
ADDR5.
MPC mode
/FRMSYNC14.
Frame Sync Pulse, channel 14, output, HWC
mode.
57
MOTEL/HWC
DI
MOTEL/HWC.
Set high for Motorola mode, set low for Intel mode, Micro Processor
Control (MPC) mode, input
/HWC.
pull high for HWC mode, input.
39
R/W(WR)/HWC
select
DI
R/W(WR).
R/W for Motorola interface, WR for Intel interface /HWC select, set low for
HWC mode.
40
(RD)/HWC select
DI
(RD).
Unused for Motorola interface, RD for Intel interface /HWC select, set low for
HWC mode.
38
CS /HWC select
DI
CS.
Chip select, HWC select, set low for HWC mode.
41
ALE/HTU_SEL
DI
ALE.
Address latch enable for Intel interface, MPC mode, input
/HTU_SEL.
HTUC/
HTUR select, High for HTUC, Low for HTUR, HWC mode, input.
1. AI = Analog Input; AO = Analog Output; DI = Digital Input; DO = Digital Output; NC = No Clamp. Pad will not clamp input in
the absence of power; PU = Input contains pull-up; PD = Input contains pull-down; I/O = Input/Output; OD = Open Drain
Output;
TO = Tri-State Output.
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