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參數(shù)資料
| 型號： | LUCW3000CCN |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 2200 MHz, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁數(shù)： | 13/28頁 |
| 文件大?。?/td> | 326K |
| 代理商： | LUCW3000CCN |
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Advance Data Sheet
W3000 PLL Dual-Band Frequency Synthesizer
December 1999
Lucent Technologies Inc.
20
Application Information (continued)
General rules for the values of these components have been derived many times
1, and are quoted here merely
for reference. If:
p
tan
sec
1
T
ω
φ
φ
=
)
3
T
1
T
(
*
1
2
T
2
c
+
ω
=
2
REF
20
/
attn
)
F
*
2
(
1
10
3
T
π
=
where
φ = Phase margin required, normally 45° for a critically damped response.
p
ω = Loop bandwidth.
c
ω = Loop bandwidth modified for extra pole of R3 and C3, as described by:
(
)
(
)
[
]
+
φ
+
φ
=
ω
1
)
3
T
1
T
(
*
tan
3
T
*
1
T
)
3
T
1
T
(
1
*
T3
*
T1
T3)
(T1
T3)
(T1
*
tan
2
c
fREF = Reference frequency.
atten = Attenuation provided by the third pole at the reference frequency.
The loop filter values can then be derived as:
2
/
1
2
c
2
c
2
c
2
c
PD
)
3
T
*
1
)(
1
T
*
1
(
)
2
T
*
1
(
*
N
*
Kvco
*
K
*
2
T
1
T
1
C
ω
+
ω
+
ω
+
ω
=
=
1
T
2
T
*
1
C
2
C
2
C
2
T
1
R
=
The final pole, consisting of R2 and C3, should be chosen such that the following guidelines are followed:
10
1
C
3
C
≤
and
1
R
*
2
R
≥
1. Rohde, Ulrich L., Digital PLL Frequency Synthesizers Theory and Design, Prentice-Hall, 1983.
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