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參數(shù)資料
| 型號(hào)： | LTC3831IGN |
| 廠商： | LINEAR TECHNOLOGY CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | 0.150 INCH, PLASTIC, SSOP-16 |
| 文件頁(yè)數(shù)： | 17/20頁(yè) |
| 文件大?。?/td> | 208K |
| 代理商： | LTC3831IGN |
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LTC3831
6
3831fb
TYPICAL PERFORMANCE CHARACTERISTICS
TG ( Pin 1): Top Driver Output. Connect this pin to the
gate of the upper N-channel MOSFET, Q1. This output
swings from PGND to PVCC1. It remains low if BG is high
or during shutdown mode.
PVCC1 (Pin 2): Power Supply Input for TG. Connect this pin
to a potential of at least VIN + VGS(ON)(Q1). This potential
can be generated using an external supply or a simple
charge pump connected to the switching node between
the upper MOSFET and the lower MOSFET.
PGND (Pin 3): Power Ground. Both drivers return to
this pin. Connect this pin to a low impedance ground in
close proximity to the source of Q2. Refer to the Layout
Consideration section for more details on PCB layout
techniques.
GND (Pin 4): Signal Ground. All low power internal cir-
cuitry returns to this pin. To minimize regulation errors
due to ground currents, connect GND to PGND right at
the LTC3831.
R–, R+ (Pins 5, 7):
These two pins connect to the internal
resistor divider that generate the internal ratiometric refer-
ence for the error amplier. The reference voltage is set
at 0.5 (VR+ – VR–).
FB (Pin 6):
Feedback Voltage. FB senses the regulated
output voltage either directly or through an external
resistor divider. The FB pin is servoed to the ratiometric
reference under closed-loop conditions. The LTC3831 can
operate with a minimum VFB of 1.1V and maximum VFB
of (VCC – 1.75V).
SHDN (Pin 8): Shutdown. A TTL compatible low level at
SHDN for longer than 100μs puts the LTC3831 into shut-
down mode. In shutdown, TG and BG go low, all internal
circuits are disabled and the quiescent current drops to
10μA max. A TTL compatible high level at SHDN allows
the part to operate normally. This pin also double as an
external clock input to synchronize the internal oscillator
with an external clock.
SS (Pin 9): Soft-Start. Connect this pin to an external
capacitor, CSS, to implement a soft-start function. If the
LTC3831 goes into current limit, CSS is discharged to
reduce the duty cycle. CSS must be selected such that
during power-up, the current through Q1 will not exceed
the current limit level.
COMP (Pin 10): External Compensation. This pin internally
connects to the output of the error amplier and input of
the PWM comparator. Use a RC + C network at this pin
to compensate the feedback loop to provide optimum
transient response.
PVCC Supply Current
vs Gate Capacitance
TG Rise/Fall Time
vs Gate Capacitance
Transient Response
PIN FUNCTIONS
GATE CAPACITANCE AT TG AND BG (nF)
0
PV
CC
SUPPLY
CURRENT
(mA)
30
40
50
8
3831 G20
20
10
0
123
45
67
9
10
TA = 25°C
PVCC1,2 = 12V
PVCC1,2 = 5V
GATE CAPACITANCE AT TG AND BG (nF)
0
TG
RISE/FALL
TIME
(ns)
120
160
200
8
3831 G21
80
40
100
140
180
60
20
0
2
1
4
3
67
9
5
10
TA = 25°C
tf AT PVCC1,2 = 12V
tr AT PVCC1,2 = 12V
tr AT PVCC1,2 = 5V
tf AT PVCC1,2 = 5V
VOUT
50mV/
DIV
50μs/DIV
3831 G22
ILOAD
2A/DIV
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