參數(shù)資料
型號: LTC2442CG
廠商: LINEAR TECHNOLOGY CORP
元件分類: ADC
英文描述: 24-Bit High Speed 4-Channel Delta-Sigma ADC with Integrated Amplifi er
中文描述: 4-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO36
封裝: 5.30 MM, PLASTIC, SSOP-36
文件頁數(shù): 9/32頁
文件大?。?/td> 392K
代理商: LTC2442CG
LTC2442
9
2442f
FU
W
CONVERTER OPERATION
Converter Operation Cycle
The LTC2442 is a multi-channel, high speed,
ΔΣ
analog-
to-digital converter with an easy to use 3- or 4-wire serial
interface (see Figure 1). Its operation is made up of three
states. The converter operating cycle begins with the con-
version, followed by the sleep state and ends with the data
output/input (see Figure 2). The 4-wire interface consists
of serial data input (SDI), serial data output (SDO), serial
clock (SCK) and chip select (CS). The interface, timing,
operation cycle and data out format is compatible with
Linear’s entire family of
ΔΣ
converters.
Initially, the LTC2442 performs a conversion. Once the
conversion is complete, the device enters the sleep state.
The part remains in the sleep state as long as CS is HIGH.
The conversion result is held indefinitely in a static shift
register while the converter is in the sleep state.
AUTOCALIBRATION
AND CONTROL
DIFFERENTIAL
3RD ORDER
Σ
MODULATOR
DECIMATING FIR
ADDRESS
INTERNAL
OSCILLATOR
SERIAL
INTERFACE
GND
V
CC
CH0
CH1
CH2
CH3
COM
IN
+
IN
SDO
CS
SCK
REF
+
ADCINB
ADCINA
OUTB
OUTA
REF
EXT
SDI
BUSY
F
O
2442 F01
+
+
MUX
–INB
+INB
MUXOUTB
MUXOUTA +INA
–INA
AMPB
AMPA
V
+
V
1.69k
SDO
2442 TA03
Hi-Z TO V
OH
V
OL
TO V
V
OH
TO Hi-Z
C
LOAD
= 20pF
1.69k
SDO
2442 TA04
Hi-Z TO V
OL
V
OH
TO V
V
OL
TO Hi-Z
C
LOAD
= 20pF
V
CC
CONVERT
SLEEP
CHANNEL SELECT
SPEED SELECT
DATA OUTPUT
POWER UP
IN
+
=CH0, IN
=CH1
OSR=256,1X MODE
2442 F02
CS = LOW
AND
SCK
Figure 2. LTC2442 State Transition Diagram
APPLICATIU
W
U
U
TEST CIRCUITS
Figure 1. Functional Block Diagram
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PDF描述
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