參數(shù)資料
型號(hào)： LPC2923FBD100
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： ARM9 microcontroller with CAN, LIN, and USB
中文描述： 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100
文件頁(yè)數(shù)： 42/84頁(yè)
文件大?。?/td> 551K
代理商： LPC2923FBD100
LPC2921_23_25_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2010
42 of 84
NXP Semiconductors
LPC2921/2923/2925
ARM9 microcontroller with CAN, LIN, and USB
6.15.2
Clock Generation Unit (CGU0)
The key features are:
Generation of 11 base clocks selectable from several embedded clock sources.
Crystal oscillator with power-down.
Control PLL with power-down.
Very low-power ring oscillator, always on to provide a safe clock.
Seven fractional clock dividers with L/D division.
Individual source selector for each base clock, with glitch-free switching.
Autonomous clock-activity detection on every clock source.
Protection against switching to invalid or inactive clock sources.
Embedded frequency counter.
Register write-protection mechanism to prevent unintentional alteration of clocks.
Remark:
Any clock-frequency adjustment has a direct impact on the timing of all on-board
peripherals.
6.15.2.1
Functional description
The clock generation unit provides 11 internal clock sources as described in
Table 24
.
Table 24.
Number Name
[1]
Maximum frequency that guarantees stable operation of the LPC2921/2923/2925.
[2]
Fixed to low-power oscillator.
For generation of these base clocks, the CGU consists of primary and secondary clock
generators and one output generator for each base clock.
CGU0 base clocks
Frequency
(MHz)
[1]
0.4
125
0.4
[2]
125
125
125
125
50
125
4.5
-
125
Description
0
1
2
3
4
5
6
7
8
9
10
11
BASE_SAFE_CLK
BASE_SYS_CLK
BASE_PCR_CLK
BASE_IVNSS_CLK
BASE_MSCSS_CLK
BASE_ICLK0_CLK
BASE_UART_CLK
BASE_SPI_CLK
BASE_TMR_CLK
BASE_ADC_CLK
reserved
BASE_ICLK1_CLK
base safe clock (always on)
base system clock
base PCR subsystem clock
base IVNSS subsystem clock
base MSCSS subsystem clock
base internal clock 0, for CGU1
base UART clock
base SPI clock
base timers clock
base ADCs clock
-
base internal clock 1, for CGU1
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