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參數(shù)資料
| 型號(hào)： | LPC2923FBD100 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | ARM9 microcontroller with CAN, LIN, and USB |
| 中文描述： | 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100 |
| 文件頁數(shù)： | 12/84頁 |
| 文件大?。?/td> | 551K |
| 代理商： | LPC2923FBD100 |
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LPC2921_23_25_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2010
12 of 84
NXP Semiconductors
LPC2921/2923/2925
ARM9 microcontroller with CAN, LIN, and USB
6.6 Reset, debug, test, and power description
6.6.1
Reset and power-up behavior
The LPC2921/2923/2925 contains external reset input and internal power-up reset
circuits. This ensures that a reset is extended internally until the oscillators and flash have
reached a stable state. See
Section 8
for trip levels of the internal power-up reset circuit
1
.
See
Section 9
for characteristics of the several start-up and initialization times.
Table 4
shows the reset pin.
Table 4.
Symbol
RST
At activation of the RST pin the JTAGSEL pin is sensed as logic LOW. If this is the case
the LPC2921/2923/2925 is assumed to be connected to debug hardware, and internal
circuits re-program the source for the BASE_SYS_CLK to be the crystal oscillator instead
of the Low-Power Ring Oscillator (LP_OSC). This is required because the clock rate when
running at LP_OSC speed is too low for the external debugging environment.
6.6.2
Reset strategy
The LPC2921/2923/2925 contains a central module, the Reset Generator Unit (RGU) in
the Power, Clock and Reset control Subsystem (PCRSS), which controls all internal reset
signals towards the peripheral modules. The RGU provides individual reset control as well
as the monitoring functions needed for tracing a reset back to source.
6.6.3
IEEE 1149.1 interface pins (JTAG boundary-scan test)
The LPC2921/2923/2925 contains boundary-scan test logic according to IEEE 1149.1,
also referred to in this document as Joint Test Action Group (JTAG). The boundary-scan
test pins can be used to connect a debugger probe for the embedded ARM processor. Pin
JTAGSEL selects between boundary-scan mode and debug mode.
Table 5
shows the
boundary-scan test pins.
Table 5.
Symbol
JTAGSEL
1.
Only for 1.8 V power sources
Reset pin
Direction
IN
Description
external reset input, active LOW; pulled up internally
IEEE 1149.1 boundary-scan test and debug interface
Description
TAP controller select input. LOW level selects ARM debug mode and HIGH level
selects boundary scan and flash programming; pulled up internally
test reset input; pulled up internally (active LOW)
test mode select input; pulled up internally
test data input, pulled up internally
test data output
test clock input
TRST
TMS
TDI
TDO
TCK
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|---|---|
| LPC2923FBD100,551 | 功能描述:ARM微控制器 - MCU IC ARM9 MCU FLASH 256KB RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2925 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ARM9 microcontroller with CAN, LIN, and USB |
| LPC2925FBD100 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ARM9 microcontroller with CAN, LIN, and USB |
| LPC2925FBD100,551 | 功能描述:ARM微控制器 - MCU IC ARM9 MCU FLASH 512KB RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LPC2926 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ARM9 microcontroller with CAN, LIN, and USB |
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