參數(shù)資料
型號(hào): LPC2923FBD100
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: ARM9 microcontroller with CAN, LIN, and USB
中文描述: 32-BIT, FLASH, 125 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT407-1, LQFP-100
文件頁(yè)數(shù): 4/84頁(yè)
文件大?。?/td> 551K
代理商: LPC2923FBD100
LPC2921_23_25_3
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 03 — 14 April 2010
4 of 84
NXP Semiconductors
LPC2921/2923/2925
ARM9 microcontroller with CAN, LIN, and USB
4. Block diagram
Grey-shaded blocks represent peripherals and memory regions accessible by the GPDMA.
Fig 1.
LPC2921/2923/2925 block diagram
EMBEDDED FLASH
512/256/128 kB
002aae224
ARM968E-S
DTCM
16 kB
ITCM
16 kB
TEST/DEBUG
INTERFACE
slave
master
1 master
2 slaves
master
GPDMA CONTROLLER
GPDMA REGISTERS
16 kB
EEPROM
EMBEDDED SRAM 16 kB
(LPC2925 only)
SYSTEM CONTROL
TIMER0/1 MTMR
CAN0/1
GLOBAL
ACCEPTANCE
FILTER
PWM0/1/2/3
3.3 V ADC1/2
EVENT ROUTER
EMBEDDED SRAM 16 kB
GENERAL PURPOSE I/O
PORTS 0/1/5
TIMER 0/1/2/3
SPI0/1/2
RS-485 UART0/1
WDT
AHB TO APB
BRIDGE
AHB TO DTL
BRIDGE
VECTORED
INTERRUPT
CONTROLLER
master
slave
USB DEVICE
CONTROLLER
slave
slave
slave
slave
slave
slave
slave
slave
slave
AHB TO DTL
BRIDGE
AHB TO APB
BRIDGE
QUADRATURE
ENCODER
CHIP FEATURE ID
AHB TO APB
BRIDGE
I
2
C0/1
UART/LIN0/1
AHB TO APB
BRIDGE
AHB
MULTI-
LAYER
MATRIX
LPC2921/2923/2925
JTAG
interface
8 kB SRAM
general subsystem
power, clock, and
reset subsystem
MSC subsystem
networking subsystem
peripheral subsystem
CLOCK
GENERATION
UNIT
POWER
MANAGEMENT
UNIT
RESET
GENERATION
UNIT
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