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參數(shù)資料
| 型號： | LMX2512LQX0967/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 19.68 MHz, QCC28 |
| 封裝： | 5 X 5 MM, 0.75 MM HEIGHT, LLP-28 |
| 文件頁數(shù)： | 9/18頁 |
| 文件大?。?/td> | 184K |
| 代理商： | LMX2512LQX0967/NOPB |
Programming Description (Continued)
R5 REGISTER
The R5 register address bits (R5 [4:0]) are “01111”.
Register R5 is used to set the IF_R divider if the default value is not desired. This register is only active if the SPI_DEF bit in
register R0 is 0.
R5 REGISTER
Register
MSB
SHIFT REGISTER BIT LOCATION
LSB
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9876543210
Data Field
Address
Field
R5
0
011000010
IF_R
[8:0]
01111
Name
Functions
IF_R [8:0]
IF R Counter
9-bit programmable counter
2
≤ IF_R ≤ 511
R6 REGISTER
The R6 register address bits (R6 [5:0]) are “011111”.
Register R6 is used for internal testing of the device and is not intended for customer use. This register is only active if the
SPI_DEF bit in register R0 is 0.
R6 REGISTER
Register
MSB
SHIFT REGISTER BIT LOCATION
LSB
22
21
20
19
18
17
16
15
14
13
12
11
10
9876543210
Data Field
Address Field
R6
1
000000000000
0
0000
011111
LMX2502/LMX2512
www.national.com
17
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