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參數(shù)資料
| 型號： | LMX2470 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL |
| 中文描述： | 2.6 GHz的Δ-Σ分?jǐn)?shù)N與800兆赫整數(shù)N分頻PLL鎖相環(huán) |
| 文件頁數(shù)： | 27/36頁 |
| 文件大?。?/td> | 453K |
| 代理商： | LMX2470 |
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Programming Description
(Continued)
2.2 R1 REGISTER
REGISTER
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DATA[19:0] ( Except for the RF_N Register, which is [22:0] )
RF_R[5:0]
C3
0
C2
0
C1
0
C0
1
R1
RF_PD
1
RF_FD[11:0]
2.2.1 RF_FD[11:0] -- RF PLL Fractional Denominator
The function of these bits are described in section 2.8.2.
2.2.2 RF_R [5:0] -- RF R Divider Value
The RF R Counter value is determined by this control word. Note that this counter does allow values down to one.
R Value
1
...
63
RF_R[5:0]
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
1
.
1
2.2.3 RF_PD -- RF Power Down Control Bit
When this bit is set to 0, the RF PLL operates normally. When it is set to one, the RF PLL is powered down and the RF Charge
pump is set to a TRI-STATE mode. Because the EN pin and ATPU[1:0] word also controls power down functions, there may be
some conflicts. The order of precedence is as follows. First, if the EN pin is LOW, then the PLL will be powered down. Provided
this is not the case, the PLL will be powered up if theATPU[1:0] word says to do so, regardless of the state of the RF_PD bit.After
the EN pin and the ATPU[1:0] word are considered, then the RF_PD bit then takes control of the power down function for the RF
PLL.
L
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LMX2470SLEX | 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL |
| LMX2485 | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485E | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485ESQ | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485ESQX | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2470EVAL | 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 LMX2470 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| LMX2470SLEX | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2470SLEX/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2471 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:3.6 GHz Delta-Sigma Fractional-N PLL with 1.7 GHz Integer-N PLL |
| LMX2471 WAF | 制造商:Texas Instruments 功能描述: |
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