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參數(shù)資料
| 型號： | LMX2470 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL |
| 中文描述： | 2.6 GHz的Δ-Σ分數(shù)N與800兆赫整數(shù)N分頻PLL鎖相環(huán) |
| 文件頁數(shù)： | 16/36頁 |
| 文件大?。?/td> | 453K |
| 代理商： | LMX2470 |
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Bench Test Setups
(Continued)
20059370
Frequency Input Pin
OSCin
FinRF
FinIF
DC Blocking Capacitor
1000 pF
100 pF
100 pF
Corresponding Counter
RF_R / 2
RF_N / 2
IF_N / 2
Default Counter Value
50
500
500
MUX Value
14
15
13
OSC
0
X
X
Sensitivity Measurement Procedure
Sensitivity is defined as the power level limits beyond which
the output of the counter being tested is off by 1 Hz or more
of its expected value. It is typically measured over frequency,
voltage, and temperature. In order to test sensitivity, the
MUX[3:0] word is programmed to the appropriate value. The
counter value is then programmed to a fixed value and a
frequency counter is set to monitor the frequency of this pin.
The expected frequency at the Ftest/LD pin should be the
signal generator frequency divided by twice the correspond-
ing counter value. The factor of two comes in because the
LMX2470 has a flip-flop which divides this frequency by two
to make the duty cycle 50% in order to make it easier to read
with the frequency counter. The frequency counter input
impedance should be set to high impedance. In order to
perform the measurement, the temperature, frequency, and
voltage is set to a fixed value and the power level of the
signal is varied. Note that the power level at the part is
assumed to be 4 dB less than the signal generator power
level. This accounts for 1 dB for cable losses and 3 dB for the
pad. The power level range where the frequency is correct at
the Ftest/LD pin to within 1 Hz accuracy is recorded for the
sensitivity limits. The temperature, frequency, and voltage
can be varied in order to produce a family of sensitivity
curves. Since this is an open-loop test, the charge pump is
set to TRI-STATE and the unused side of the PLL (RF or IF)
is powered down when not being tested. For this part, there
are actually four frequency input pins, although there is only
one frequency test pin (Ftest/LD). The conditions specific to
each pin are show above.
L
www.national.com
16
相關PDF資料 |
PDF描述 |
|---|---|
| LMX2470SLEX | 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL |
| LMX2485 | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485E | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485ESQ | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
| LMX2485ESQX | 50 MHz - 3.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 800 MHz Integer PLL |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2470EVAL | 功能描述:時鐘和定時器開發(fā)工具 LMX2470 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| LMX2470SLEX | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2470SLEX/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2471 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:3.6 GHz Delta-Sigma Fractional-N PLL with 1.7 GHz Integer-N PLL |
| LMX2471 WAF | 制造商:Texas Instruments 功能描述: |
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