參數(shù)資料
型號(hào): LM93CIMT
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: Hardware Monitor with Integrated Fan Control for Server Management
中文描述: 16-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO56
封裝: MO-153EE, TSSOP-56
文件頁數(shù): 38/92頁
文件大?。?/td> 654K
代理商: LM93CIMT
16.0 Registers
(Continued)
Lock
SETUP REGISTERS
Register Name
Address
Default
Description
x
Zone 1 Base Temperature
D0h
N/D
Base temperature to which look-up table offset is applied for
Zone 1
Base temperature to which look-up table offset is applied for
Zone 2
Base temperature to which look-up table offset is applied for
Zone 3
Base temperature to which look-up table offset is applied for
Zone 4
x
Zone 2 Base Temperature
D1h
N/D
x
Zone 3 Base Temperature
D2h
N/D
x
Zone 4 Base Temperature
D3h
N/D
x
x
x
x
x
x
x
x
x
x
x
x
Step 2 Temp Offset
Step 3 Temp Offset
Step 4 Temp Offset
Step 5 Temp Offset
Step 6 Temp Offset
Step 7 Temp Offset
Step 8 Temp Offset
Step 9 Temp Offset
Step 10 Temp Offset
Step 11 Temp Offset
Step 12 Temp Offset
Step 13 Temp Offset
D4h
D5h
D6h
D7h
D8h
D9h
DAh
DBh
DCh
DDh
DEh
DFh
N/D
N/D
N/D
N/D
N/D
N/D
N/D
N/D
N/D
N/D
N/D
N/D
Step 2 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 3 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 4 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 5 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 6 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 7 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 8 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 9 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 10 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 11 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 12 Zone 1/2 and Zone 3/4 Offset Temperatures
Step 13 Zone 1/2 and Zone 3/4 Offset Temperatures
x
Special Function TACH to PWM
Binding
Reserved
E0h
00h
Controls the tachometer input to PWM output binding
E1
N/D
x
LM93 Status/Control
E2h
00h
Gives Master error status, ASF reset control and Max PWM
control
Configures various outputs and provides START bit
x
LM93 Configuration
SLEEP STATE CONTROL AND MASK REGISTERS
Sleep State Control
S1 GPI Mask
S1 Fan Mask
S3 GPI Mask
S3 Fan Mask
S3 Temperature/Voltage Mask
S4/5 GPI Mask
S4/5 Temperature/Voltage Mask
OTHER MASK REGISTERS
GPI Error Mask
Miscellaneous Error Mask
E3h
00h
E4h
E5h
E6h
E7h
E8h
E9h
EAh
EBh
03h
FFh
0Fh
FFh
0Fh
07h
FFh
07h
Used to communicate the system sleep state to the LM93
Sleep state S1 GPI error mask register
Sleep state S1 fan tach error mask register
Sleep state S3 GPI error mask register
Sleep state S3 fan tach error mask register
Sleep state S3 temperature or voltage error mask register
Sleep state S4/5 GPI error mask register
Sleep state S4/5 temperature or voltage error mask register
ECh
EDh
FFh
3Fh
Error mask register for GPI faults
Error mask register for VRDx_HOT, SCSI_TERMx, and
dynamic Vccp limit checking.
ZONE 1 AND 2 TEMPERATURE READING OFFSET REGISTERS
x
Special Function Zone 1 Adjustment
Offset
x
Special Function Zone 2 Adjustment
Offset
EEh
00h
Allows all Zone 1 temperature measurements to be adjusted by
a programmable offset
Allows all Zone 2 temperature measurements to be adjusted by
a programmable offset
EFh
00h
L
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