參數(shù)資料
型號: LM93CIMT
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: Hardware Monitor with Integrated Fan Control for Server Management
中文描述: 16-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO56
封裝: MO-153EE, TSSOP-56
文件頁數(shù): 20/92頁
文件大?。?/td> 654K
代理商: LM93CIMT
14.0 SMBus Interface
(Continued)
14.5.2 Block Command Code Summary
Block command codes control the block read and write operations of the LM93 as summarized in the following table:
Command Code Name
Block Write Command
Block Read Command
Fixed Block 0
Fixed Block 1
Fixed Block 2
Fixed Block 3
Fixed Block 4
Fixed Block 5
Fixed Block 6
Fixed Block 7
Fixed Block 8
Fixed Block 9
Fixed Block 10
Fixed Block 11
Value
F0h
F1h
F2h
F3h
F4h
F5h
F6h
F7h
F8h
F9h
FAh
FBh
FCh
FDh
Description
SMBus Block Write Command Code
SMBus Block Write/Read Process Call
Fixed Block Read Command Code: address 40h, size 8 bytes
Fixed Block Read Command Code: address 48h, size 8 bytes
Fixed Block Read Command Code: address 50h, size 6 bytes
Fixed Block Read Command Code: address 56h, size 16 bytes
Fixed Block Read Command Code: address 67h, size 4 bytes
Fixed Block Read Command Code: address 6Eh, size 8 bytes
Fixed Block Read Command Code: address 78h, size 12 bytes
Fixed Block Read Command Code: address 90h, size 32 bytes
Fixed Block Read Command Code: address B4h, size 8 bytes
Fixed Block Read Command Code: address C8h, size 8 bytes
Fixed Block Read Command Code: address D00h, size 16 bytes
Fixed Block Read Command Code: address E5h, size 9 bytes
14.5.3 Write Operations
The LM93 supports the following SMBus write protocols.
14.5.3.1 Write Byte
In this operation the master device sends an address byte and one data byte to the slave device, as follows:
1.
The master device asserts a START condition.
2.
The master sends the 7-bit slave address followed by the write bit (low).
3.
The addressed slave device asserts ACK.
4.
The master sends a command code (register address).
5.
The slave asserts ACK.
6.
The master sends the data byte.
7.
The slave asserts ACK.
8.
The master asserts a STOP condition to end the transaction.
1
S
2
Slave
Address
3
A
4
Register
Address
5
A
6
Data
Byte
7
A
8
P
W
14.5.3.2 Write Word
In this operation the master device sends an address byte and two data bytes to the slave device, as follows:
1.
The master device asserts a START condition.
2.
The master sends the 7-bit slave address followed by the write bit (low).
3.
The addressed slave device asserts ACK.
4.
The master sends a command code (register address).
5.
The slave asserts ACK.
6.
The master sends the low data byte.
7.
The slave asserts ACK.
8.
The master sends the high data byte.
9.
The slave asserts ACK.
10. The master asserts a STOP condition to end the transaction.
1
S
2
Slave
Address
3
A
4
Register
Address
5
A
6
Data Byte
Low
7
A
8
Data Byte
High
9
A
10
P
W
L
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