參數(shù)資料
型號: LLT3837EFE
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 110 kHz SWITCHING FREQ-MAX, PDSO16
封裝: 4.40 MM, PLASTIC, TSSOP-16
文件頁數(shù): 26/28頁
文件大?。?/td> 255K
代理商: LLT3837EFE
LT3837
7
3837fa
PIN FUNCTIONS
UVLO (Pin 10): A resistive divider from VIN to this pin sets
an undervoltage lockout based upon VIN level (not VCC).
When the UVLO pin is below its threshold, the gate drives
are disabled, but the part draws its normal quiescent current
from VCC. The VCC undervoltage lockout supersedes this
function so VCC must be great enough to start the part.
The bias current on this pin has hysteresis such that the
bias current is sourced when the UVLO threshold is ex-
ceeded. This introduces a hysteresis at the pin equivalent
to the bias current change times the impedance of the
upper divider resistor. The user can control the amount of
hysteresis by adjusting the impedance of the divider. See
the Applications Information for details. Tie the UVLO pin
to VCC if you are not using this function.
SENSE(Pin 11), SENSE+ (Pin 12):
These pins are used to
measure primary side switch current through an external
sense resistor. Peak primary side current is used in the
converter control loop. Make Kelvin connections to the
sense resistor to reduce noise problems. SENSEcon-
nects to the ground side. At maximum current (VC at its
maximum voltage) it has a 98mV threshold. The signal is
blanked (ignored) during the minimum turn-on time.
CCMP (Pin 13): Pin for external lter capacitor for the
optional load compensation function. Load compensation
reduces the effects of parasitic resistances in the feedback
sensing path. A 0.1
μF ceramic capacitor sufces for most
applications. Short this pin to GND in less demanding ap-
plications that don’t require load compensation.
RCMP (Pin 14): Pin for optional external load compensation
resistor. Use of this pin allows for nominal compensation
of parasitic resistances in the feedback sensing path. In
less demanding applications, this resistor is not needed
and this pin can be left open. See Applications Informa-
tion for details.
PGDLY (Pin 15): Pin for external programming resistor to
set delay from synchronous gate turn-off to primary gate
turn-on. See Applications Information for details.
PG (Pin 16): Gate drive pin for the primary side MOSFET
Switch. Large dynamic currents ow during voltage transi-
tions. See the Applications Information for details.
GND (Exposed Pad, Pin 17): This is the ground connec-
tion for both signal ground and gate driver grounds. This
GND should be connected to the PCB ground plane for
electrical contact and rated thermal performance. Careful
attention must be paid to ground layout. See Applications
Information for details.
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