參數(shù)資料
型號： LLT3837EFE
廠商： LINEAR TECHNOLOGY CORP
元件分類： 穩(wěn)壓器
英文描述： SWITCHING CONTROLLER, 110 kHz SWITCHING FREQ-MAX, PDSO16
封裝： 4.40 MM, PLASTIC, TSSOP-16
文件頁數(shù)： 25/28頁
文件大?。?/td> 255K
代理商： LLT3837EFE
LT3837
6
3837fa
TEMPERATURE (°C)
–50
MINIMUM
ENABLE
TIME
(ns)
220
240
260
25
75
3837 G21
200
180
–25
0
50
100
125
160
140
RENDLY = 90k
TEMPERATURE (°C)
–50
0
t PG
(ns)
50
150
200
250
–10
30
50
3837 G20
100
–30
10
70
90 110
300
RPGDLY = 16.7k
RPGDLY = 27.4k
PIN FUNCTIONS
TYPICAL PERFORMANCE CHARACTERISTICS
SG (Pin 1): Synchronous gate drive output. This pin pro-
vides an output signal for a secondary-side synchronous
switch. Large dynamic currents may ow during voltage
transitions. See the Applications Information for details.
VCC (Pin 2): Supply voltage pin. Bypass this pin to ground
with a 4.7
μF capacitor or more.
tON (Pin 3): Pin for external programming resistor to set
the minimum time that the primary switch is on for each
cycle. Minimum turn-on facilitates the isolated feedback
method. See Applications Information for details.
ENDLY (Pin 4): Pin for external programming resistor to
set enable delay time. The enable delay time disables the
feedback amplier for a xed time after the turn-off of the
primary-side MOSFET. This allows the leakage inductance
voltage spike to be ignored for yback voltage sensing.
See Applications Information for details.
SYNC (Pin 5): Pin for synchronizing the internal oscilla-
tor with an external clock. The positive edge on a pulse
causes the oscillator to discharge causing PG to go low
(off) and SG high (on). The sync threshold is typically 1.4V.
See Applications Information for details. Tie to ground if
unused.
SFST (Pin 6): This pin, in conjunction with a capacitor to
ground, controls the ramp-up of peak primary current as
sensed through the sense resistor. This is used to control
converter inrush current at start-up. The VC pin voltage
cannot exceed the SFST pin voltage, so as SFST increases,
the maximum voltage on VC increases commensurately,
allowing higher peak currents. Total VC ramp time is ap-
proximately 70ms per
μF of capacitance. Leave pin open
if not using the soft-start function.
OSC (Pin 7): This pin in conjunction with an external
capacitor denes the controller oscillator frequency. The
frequency is approximately 100kHz 100/COSC(pF).
FB (Pin 8): Pin for the feedback node for the power sup-
ply feedback amplier. Feedback is sensed via a trans-
former winding and enabled during the yback period.
This pin also sinks additional current to compensate for
load current variation as set by the RCMP pin. Keep the
Thevenin equivalent resistance of the feedback divider
at roughly 3k.
VC (Pin 9): Pin used for frequency compensation for the
switcher control loop. It is the output of the feedback
amplier and the input to the current comparator. Switcher
frequency compensation components are normally placed
on this pin to ground. The voltage on this pin is propor-
tional to the peak primary switch current. The feedback
amplier output is enabled during the synchronous switch
on time.
PG Delay Time vs Temperature
Enable Delay Time vs Temperature
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