參數(shù)資料
型號(hào): LC89057W-VF4-E
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: 7 X 7 MM, SQFP-48
文件頁數(shù): 5/61頁
文件大?。?/td> 355K
代理商: LC89057W-VF4-E
LC89057W-VF4-E
No. 7202-13/61
8.1.3 Oscillation amplifiers (XIN, XOUT, MCK)
The LC89057W-VF4-E features a built-in oscillation amplifier. An oscillation circuit can be configured by
connecting a crystal resonator, feedback resistor, and load capacitance to XIN and XOUT. When connecting a
crystal resonator, use a fundamental crystal resonator. Also, note that the load capacitance depends on the crystal
resonator characteristics.
If not using the built-in oscillation amplifier and using instead an oscillation module, etc., as the clock source,
connect the output of an external clock supply source to XIN. At this time, it is not necessary to connect a feedback
resistor between XIN and XOUT.
Supply the 12.288MHz or 24.576MHz clock set with XINSEL to XIN. If inputting another frequency to XIN, it is
necessary to perform a setting with FSERR so that even if the input data sampling frequency changes, the result is
not reflected to the error flag. Operation is made possible by performing this setting. However, since time definition
gap occurs in relation to the recommended frequency operation, the encoding result cannot be used for input fs
calculations. In this case, the input fs can be calculated by performing decimal division of the count value with
1/2000th of the XIN input frequency. For details, see Chapter 10 Microcontroller Interface.
Since the XIN clock serves as the reference for internal processing, complete the XINSEL setting prior to bi-phase
data input.
Always perform clock supply to XIN for the following applications.
(1) Detection of bi-phase data input
(2) Clock source during PLL is unlocked
(3) Input data sampling frequency calculation
(4) Time definition during input data switching
(5) External supply clock source (AD converter clock, etc.) for XIN source
The oscillation amplifier automatically stops while PLL is locked. However, it can also be set for continuous
operation with AMPOPR0,1. Although setting the continuous operation mode enables input data detection and input
sampling frequency calculation even when the PLL is locked, this has an effect on the sound quality because the
oscillation amplifier and PLL clock coexist.
If the oscillation amplifier is set to continuous operation with AMPOPR0,1 while PLL is locked, RERR outputs an
error ("H") once. This is because, at the same time that the oscillation amplifier goes into the operating state, the fs
calculation value held when its operation stopped is reset. This error has no influence on clock output, but RDATA
is muted while this error occurs. Therefore, the AMPOPR0,1 setting must be completed either prior to bi-phase data
input or during PLL unlock.
The oscillation amplifier can be stopped if it is unnecessary. However, when the operation is resumed after being
stopped, return to the normal operation after an interval of 10ms or longer to allow the resonator oscillation to
stabilize.
XMCK outputs the XIN clock. The XMCK output settings are performed with XMSEL0,1. The XIN clock can be
set to 1/1, 1/2, and muted output.
When using the modulation function only, no clock needs to be supplied to XIN. In this case, use the built-in
oscillation amplifier and frequency divider for MCK, BCK, and LRCK clock generation. If using only the
oscillation amplifier, input the crystal resonator frequency to XIN and XOUT or an external clock to XIN, and fix
the potential of digital data input pins RX0 to RX6. At this time, do not perform the DIR function stop setting with
RXOPR and PLLOPR. The output clock may be muted.
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