參數(shù)資料
型號(hào)： LC89057W-VF4-E
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： 7 X 7 MM, SQFP-48
文件頁(yè)數(shù)： 17/61頁(yè)
文件大?。?/td> 355K
代理商： LC89057W-VF4-E
LC89057W-VF4-E
No. 7202-24/61
8.3.4 Data block diagram (RX0 to RX6, TX0, RXOUT, TDATA, RDATA, SDIN)
The RDATA output data is switched to SDIN input data with RDTSEL.
The SDIN input data can be input to the modulation function with TDTSEL.
Since the modulation output is input to the input switch multiplexer, it can be fetched from RXOUT. Using this
function, it is possible to use a signal that has been digitized with the A/D converter for digital recording output, etc.
MUX
(8in / 2out)
DIR
RX0
RX1
RX2
RX3
RX4
RX5
RX6
RDATA
RXOUT
TXO
DIT
TDATA
SDIN
[RDTSEL]
[TDTSEL]
Figure 8.10. Data Block Diagram
8.3.5 Calculation of input data sampling frequency
The input data sampling frequency is calculated using the XIN clock.
In the mode where the oscillation amplifier automatically stops when the PLL becomes locked, the input data
sampling frequency is calculated during the RERR error period, the calculation is completed at the same time that
the oscillation amplifier stops, and that value is then held. Therefore, following calculation completion, the value
remains unchanged until the PLL becomes unlocked.
In the mode where the oscillation amplifier operates continuously, calculation processing is performed continuously.
Even if sampling changes within the PLL capture range for input data whose channel status sampling information
does not change, the calculation results that follow the input data can be read.
The calculation result can be read from CCB address 0xEB and output registers DO4 to DO7 and DO8 to DO15.
Registers DO4 through DO7 hold the encoded result, while DO8 through DO15 hold the calculation value.
However, as the calculation count value is output in 8-bit units, the sampling frequencies that can be calculated are
greater than 24kHz. For details, see Chapter 10 Microcontroller Interface.
相關(guān)PDF資料
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