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參數(shù)資料
| 型號： | LC78628E |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 具有閃存的 16 位定點 DSP |
| 文件頁數(shù)： | 26/40頁 |
| 文件大?。?/td> | 241K |
| 代理商： | LC78628E |
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No. 6329-26/40
LC78628E
Code
Command
RES = low
$81xx
ATT DIRECT SET
DATA $00 SET (ATT –
∞
dB)
$82xx
ATT 4-STEP UP
$83xx
ATT 4-STEP DOWN
$84xx
ATT 8-STEP UP
$85xx
ATT 8-STEP DOWN
$86xx
ATT 16-STEP UP
$87xx
ATT 16-STEP DOWN
RWC
LSB
MSB
Attenuator setting command
Attenuation code
Command
A12825
LR
Internal fs signal
Start
Stop
ATT DATA
Four steps down
44.1 kHz (normal speed), 88.2 kHz (2
×
speed)
A12826
The attenuator STEP UP/DOWN commands ($82xx to $87xx) can be used to gradually change the attenuation level to
the target value in one code step (0.5 dB) at a time every 4, 8, or 16 samples. The target value can be loaded directly by
using the attenuator DIRECT SET command ($81xx).
When the attenuator STEP UP command is used, the target attenuation code must have a larger value than the code set at
that point. When the attenuator STEP DOWN command is used, inversely, the target attenuation code must have a
smaller value than the code set at that point. Also note that when either the attenuator STEP UP or DOWN command is
issued, the next attenuator setting command must not be issued until the preceding STEP UP/DOWN command has
completed, i.e. the circuit has reached the target value.
The following formula can be used to estimate the time required for the attenuation value to reach the target value set by
an attenuator STEP UP/DOWN command.
(target code – current code)
×
(4, 8, or 16)
————————————————————
44.1 kHz (normal speed) or 88.2 kHz (2
×
speed)
[ms]
The attenuator can be set in 0.5 dB steps, and the amount of attenuation can be calculated from the following formula.
attenuation = (data value – 255)
×
0.5 [dB]
Note that since this digital attenuator is located after the HDCD detection circuit, it will not affect HDCD discrimination,
no matter what attenuation level is set.
8
×
Oversampling HDCD Interpolation Filters
The 20-bit 1 fs data processed in the HDCD decoder block is 8
×
oversampled by the 8
×
oversampling HDCD
interpolation filters in the HDCD filter block. However, 4
×
oversampling is used in double-speed playback.
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