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參數(shù)資料
| 型號： | LC78628E |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 具有閃存的 16 位定點(diǎn) DSP |
| 文件頁數(shù)： | 21/40頁 |
| 文件大?。?/td> | 241K |
| 代理商： | LC78628E |
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10. Text circuit
The text function decodes and outputs the song titles and other text data written to the subcode R through W channels
in the compact disc read entry area.
A single pack, which is the subcode R through W data for 24 symbols (18 bytes = 144 (24
×
6 = 18
×
8) bits),
consists of 4 bytes of ID data, 12 bytes of text data, and 2 bytes of CRC data. The data that can be read out from the
LC78628E consists of a result flag for the CRC check (1 bit) and the 16 bytes of the ID and text data. When the IC is
in a state where the data can be read out, it outputs a low-level pulse (minimum: 60 μs, maximum: 150 μs) from the
DQSY pin and outputs, from the SRDT pin, the CRC check result flag (OK: high, NG: low) for the one pack of data
that can be read out. After the control microprocessor detects the low level on the DQSY pin, it can read out the data
serially from the SRDT by applying 128 transfer clock pulses to the SCLK pin. The application must complete the
readout of one pack of data within 3.3 ms in normal-speed playback mode, and within 1.5 ms in 2
×
-speed playback
mode. Since the type and other information concerning the following text data is encoded in the ID data, the control
microprocessor must interpret the text data according to the ID data.
No. 6329-21/40
LC78628E
Data for one pack
1 packet = 4 packs
SBSY
DQSY
SCLK
SRDT
DQSY
SCLK
SRDT
CRC D0 D1 D2 D3 D4 D5 D6
D127
D0 D1 D2 D3 D4 D5
D126
CRC
A12819
: Correct data
: Flagged data
: Linearly interpolated data
: Data converging
to the mute level
A12820
Code
Command
RES = low
$01
MUTE
0 dB
$02
MUTE
–12 dB
–
∞
dB
$03
MUTE
G
G
An attenuation of 12 dB (MUTE –12 dB) or full muting (MUTE –
∞
dB) can be applied by issuing the appropriate command from the table. Since zero cross
muting is used, there is minimal noise associated with this function. Zero cross is defined for this function as the top seven bits being all ones or all zeros.
Caution: Note that it may become impossible to detect HDCD discs if either the $02 or $03 instruction is executed.
12. Interpolation circuit
The output of incorrect audio data that could not be corrected by the error detection and correction circuit would
result in loud noise in the output. To minimize this noise, the LC78628E replaces the incorrect data with linearly
interpolated data based on the correct data on either side of the incorrect data. More precisely, the LC78628E uses
this technique if C2 flags occurred up to three times in a row. If C2 flags occurred four or more times in a row, the
LC78628E converges the output level to the muting level. However, when correct data is finally output following
four or more C2 flag occurrences, the LC78628E replaces the 3 data items between the data actually output at the
fourth preceding item and the correct data with data linearly interpolated between those two values.
11. Muting control circuit
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC78630 | 16-bit fixed point DSP with Flash |
| LC78630E | 16-bit fixed point DSP with Flash |
| LC78631 | 16-bit fixed point DSP with Flash |
| LC78631E | 16-bit fixed point DSP with Flash |
| LC78632 | 16-bit fixed point DSP with Flash |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC7863 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:DIGITAL SIGNAL PROCESSOR FOR COMPACT DISC PLAYERS |
| LC78630 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disk Player DSP |
| LC78630E | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disk Player DSP |
| LC78631 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disk Player DSP |
| LC78631E | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disk Player DSP |
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