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參數(shù)資料
| 型號： | LC78626E |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-bit fixed point DSP with Flash |
| 中文描述： | 具有閃存的 16 位定點 DSP |
| 文件頁數(shù)： | 19/32頁 |
| 文件大?。?/td> | 475K |
| 代理商： | LC78626E |
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The THLD Signal is generated on the LA9230M, 9240M Series side, and causes the tracking error signal to be held
during the JP pulse period.
*
The Tracking Brake
The relationship between the TES, HFL, and TOFF signals during the track jump period c is as shown below. The
TOFF signal is generated from the HFL signal with the changing edge of the TES signal. The high of the HFL signal
is for the mirrored area, while the low is for the pitted area. As the beam sweeps from the mirrored surface to the
pitted area, TOFF becomes high, and as the beam sweeps from the pitted area to the mirrored surface, TOFF is made
low in the gain-enhanced state (TGL low), and the brake is applied.
(4) The JP 3-state Output
Using the JP 3-state command, the track jump can be controlled with a single pin, however, the gain must be
increased on the servo side because the kick gain will decrease by 6 dB.
(5) The Track Check Mode
After the track check IN or track check OUT command has been entered, then when a discretionary number between
8 and 254 is entered as binary data, a track count of the specified number - 1 will be performed.
No. 5692-19/32
LC78626E
Code
COMMAND
RES = low
$B6
JP 3-state output
$B7
JP 2-state output (conventional method)
G
G
Code
COMMAND
RES = low
$F0
Track check IN
$F8
Track check OUT
$FF
Two byte command reset
G
G
TES (when moving towards the outside)
TES (when moving towards the inside)
HFL
TOFF output
2-state output
3-state output
High impedance output
The number of desired track checks = the number of track checks input – 1
Command
Track check
Track check
In/Out command
Binary input of the desired
number of tracks + 1
Double byte
command reset
Rising edge at the
number of tracks/2
Goes low when the track
check is complete.
Brake command
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