參數(shù)資料
型號: L9352-DIE1
廠商: 意法半導體
英文描述: INTELLIGENT QUAD 2X5A/2X2.5A LOW-SIDE SWITCH
中文描述: 智能四2X5A/2X2.5A低邊開關(guān)
文件頁數(shù): 7/21頁
文件大小: 328K
代理商: L9352-DIE1
7/21
L9352
t
f
Output fall time
I
Q
= 1A
0.5
1.5
8
μ
s
t
sf
Short error detection filter time
f
CLK
= 250kHz DC = 50%
(3)
4
8
μ
s
t
lf
Long error detection filter time
f
CLK
= 250kHz DC = 50%
(3)
16
32
μ
s
t
SCP
Short circuit switch-OFF delay time
(3)
4
30
μ
s
t
D
Status delay time
(3)
896
1024
us
t
RE
Regulation error status delay time
(3)
(reg. channels only)
10
ms
t
Dreg
Output off status delay time
(3)
(reg. channels only
528
μ
s
Reg. Current Accuracy (reg. channels only)
I
Q3/Q4
Minimum current
DC = 10%
200
250
300
mA
I
Q3/Q4
Maximum current
DC = 90%
2
2.25
2.5
A
I
REG
Max. regulation deviation @
DC 10% - 90%
250mA < I
Q3/Q4
< 400mA
400mA
I
Q3/Q4
800mA
800mA < I
Q3/Q4
< 2.25A
±10
±6
±10
%
%
%
I
Q3/Q4
Min. quant. step
5
mA
Frequencies
CLK frequency
crystal-controlled
250
kHz
Input PWM frequency
(reg. channels only)
2
kHz
(1)
(2)
(3)
This parameter will not be tested but assured by design.
Short circuit between two digital outputs (one in high the other in low state) will lead to the defined result "LOW"
Digital filtered with external clock, only functional test
ELECTRICAL CHARACTERISTCS
:
(continued)
(Vs = 4.8 to 18V; T
j
= -40 to 150°C unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
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