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參數(shù)資料
| 型號： | L7250 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 運動控制電子 |
| 英文描述： | VOICE COIL MOTOR CONTROLLER, PQFP64 |
| 封裝： | TQFP-64 |
| 文件頁數(shù)： | 28/46頁 |
| 文件大?。?/td> | 478K |
| 代理商： | L7250 |
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L7250
34/46
Figure 13. VCM Bemf Offset CALIBRATION Routine
At the end of the calibration routine the analog value measured at pin 31 is rapresenting the VCM BEMF value
at the zero motion (BEMF zero value). With the ADC it is possible to operate a new convertion in order to mem-
orize this value and to take in account of it during the load/unload procedure.
3.8.4 Power Off Unload - Active brake and constant voltage unload operation
In case of power shut down, an unload procedure start automatically in order to take the heads over the ramp
in the parking position (the same procedure can be also enabled, when the power is on, via serial port program-
ming the unload/retract status of the VCM -> reg. 03H. In this case at the end of the unload phase the spindle
motor is driven in tri-state condition).
The unload procedure doesn’t start at power off if the VCM status bit are set to 000 because the system is con-
sidering the heads already in park position. No entering the unload procedure also the spindle brake is not ac-
tivated.
The unload procedure is done in two step:
- active brake
- constant voltage unload operation
The unload procedure take place only if the VCM status bit have moved from the 000 configuration. Otherwise
the unload procedure doesn't start and in case of power shut down the spindle motor enter the brake condition.
Active Brake : it is used to have a fast recovery of the VCM velocity down to the unload programmed velocity.
If just before a power shut down a fast seek was commanded, it is necessary to recover the VCM velocity in
Set VCM in T ristate
Write Reg.03H
VCMState[2:0] = 001
START
VCM Bemf offset calibration
Routine
Set ADC Clock
Write Reg.06H
PREADC[1:0] = 01
START 10Bit ADC Conversion
of the BEMF Channel
Write Reg.0CH
ADC_CH_ADDR[1:0] =10
ADC_ST ART =1
EXIT
VCM Bemf offset calibration
W ait End of
Conversion
Read 10Bit ADC
Read Reg.0BH
ADC_DATA[9:2]
Read Reg.0CH
ADC_DATA[1:0]
YES
NO
OPTIONAL
Latch O ffset Compensation
W rite Reg.03H
BemfOffCal = 1
then
BemfOffCal = 0
To restart this routine is mandatory to start
First the clear routine (see Fig. 10)
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