參數(shù)資料
型號: L6711
廠商: 意法半導(dǎo)體
英文描述: 3 PHASE CONTROLLER WITH DYNAMIC VID AND SELECTABLE DACs
中文描述: 3相控制器,動(dòng)態(tài)VID和可選數(shù)模轉(zhuǎn)換器
文件頁數(shù): 22/38頁
文件大?。?/td> 591K
代理商: L6711
L6711
22/38
Figure 15. Dynamic VID Transition, Hammer DAC
9.2
Selecting the HAMMER DAC, the device checks for VID code modifications on the rising edge of a clock
that is the same frequency of each phase and waits for a confirmation on the following falling edge. Once
the new code is stable, on the next rising edge the reference starts stepping up or down in LSB increments
(25mV) every clock cycle until the new VID code is reached. During the transition, VID code changes are
ignored; the device re-starts monitoring VID after the transition has finished on the next rising edge.
If the new VID code is more than 1 bit higher than the previous, the device will execute the transition step-
ping the reference every switching cycle until the new code has reached
VID_SEL = GND (see Figure 15).
10 ENABLE AND DISABLE
The device has three different supplies: VCC pin to supply the internal control logic, VCCDRx to supply
the low side drivers and BOOTx to supply the high side drivers. If the voltage at pins VCC and VCCDRx
are not above the turn on thresholds specified in the Electrical Characteristics, the device is shut down:
all drivers keep the mosfets off to show high impedance to the load. Once the device is correctly supplied,
proper operation is assured but the device can be controlled in different ways:
10.1 OUTEN pin
It can be used to control the power sequencing in complex systems. Setting the pin free, the device im-
plements a soft start up to the programmed voltage. Shorting the pin to SGND, it resets the device
(SS_END is shorted to SGND in this condition and protections are disabled except pre-OVP) from any
latched condition and also disables the device keeping all the mosfet turned off to show high impedance
to the load. It can be then cycled to recover from any latched condition such as OVP and UVP.
10.2 NOCPU (VID [0;5]=11111x)
In this condition (VID5 state is irrelevant) the device is disabled and keeps all the mosfet turned off to show
high impedance to the load. Nevertheless, it waits for any VID code transition to power up implementing
a soft start. During this condition, SS_END pin is shorted to SGND.
4 Step VID Transition - Hammer DAC
t
t
t
V
V
V
VID [0,5]
Int. Reference
Vout
Tsw
R
R
R
R
V
t
V
V
VID Clock
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