參數(shù)資料
型號: KSZ8863FLL-EVAL
廠商: Micrel Inc
文件頁數(shù): 62/106頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR KSZ8863FLL
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng) PHY
嵌入式:
已用 IC / 零件: KSZ8863FLL
已供物品:
相關(guān)產(chǎn)品: 576-3750-ND - IC ETHERNET SWITCH 3PORT 48-LQFP
576-3576-ND - IC ETHERNET SW 3PORT 48-LQFP
其它名稱: 576-3866
PIC16C72 Series
DS39016A-page 58
Preliminary
1998 Microchip Technology Inc.
9.4
A/D Conversions
9.5
Use of the CCP Trigger
An A/D conversion can be started by the “special event
trigger” of the CCP1 module. This requires that the
CCP1M3:CCP1M0 bits (CCP1CON<3:0>) be pro-
grammed as 1011 and that the A/D module is enabled
(ADON bit is set). When the trigger occurs, the
GO/DONE bit will be set, starting the A/D conversion,
and the Timer1 counter will be reset to zero. Timer1 is
reset to automatically repeat the A/D acquisition period
with minimal software overhead (moving the ADRES to
the desired location). The appropriate analog input
channel must be selected and the minimum acquisition
done before the “special event trigger” sets the
GO/DONE bit (starts a conversion).
If the A/D module is not enabled (ADON is cleared),
then the “special event trigger” will be ignored by the
A/D module, but will still reset the Timer1 counter.
TABLE 9-2
REGISTERS/BITS ASSOCIATED WITH A/D
Note:
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on all
other Resets
0Bh,8Bh
INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF
0000 000x
0000 000u
0Ch
PIR1
ADIF
SSPIF
CCP1IF
TMR2IF
TMR1IF
-0-- 0000
8Ch
PIE1
ADIE
SSPIE
CCP1IE
TMR2IE TMR1IE
-0-- 0000
1Eh
ADRES
A/D Result Register
xxxx xxxx
uuuu uuuu
1Fh
ADCON0
ADCS1 ADCS0 CHS2 CHS1
CHS0
GO/DONE
ADON
0000 00-0
9Fh
ADCON1
PCFG2
PCFG1
PCFG0
---- -000
05h
PORTA
RA5
RA4
RA3
RA2
RA1
RA0
--0x 0000
--0u 0000
85h
TRISA
PORTA Data Direction Register
--11 1111
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used for A/D conversion.
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