參數(shù)資料
型號(hào)： KSZ8863FLL-EVAL
廠商： Micrel Inc
文件頁數(shù)： 13/106頁
文件大小： 0K
描述： BOARD EVALUATION FOR KSZ8863FLL
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，以太網(wǎng) PHY
嵌入式： 否
已用 IC / 零件： KSZ8863FLL
已供物品： 板
相關(guān)產(chǎn)品： 576-3750-ND - IC ETHERNET SWITCH 3PORT 48-LQFP
576-3576-ND - IC ETHERNET SW 3PORT 48-LQFP
其它名稱： 576-3866
PIC16C72 Series
1998 Microchip Technology Inc.
Preliminary
DS39016A-page 13
2.2.2.5
PIR1 REGISTER
This register contains the individual ag bits for the
Peripheral interrupts.
FIGURE 2-7:
PIR1 REGISTER (ADDRESS 0Ch)
Note:
Interrupt ag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt ag bits are clear prior to enabling an
interrupt.
U-0
R/W-0
U-0
R/W-0
—
ADIF
—
SSPIF
CCP1IF
TMR2IF
TMR1IF
R
= Readable bit
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
- n = Value at POR reset
bit7
bit0
bit 7:
Unimplemented: Read as '0'
bit 6:
ADIF: A/D Converter Interrupt Flag bit
1 = An A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
bit 5-4: Unimplemented: Read as '0'
bit 3:
SSPIF: Synchronous Serial Port Interrupt Flag bit
1 = The transmission/reception is complete (must be cleared in software)
0 = Waiting to transmit/receive
bit 2:
CCP1IF: CCP1 Interrupt Flag bit
Capture Mode
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM Mode
Unused in this mode
bit 1:
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
bit 0:
TMR1IF: TMR1 Overow Interrupt Flag bit
1 = TMR1 register overowed (must be cleared in software)
0 = TMR1 register did not overow
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