- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1931 > KSZ8862-16MQL (Micrel Inc)IC SWITCH 10/100 16BIT 128-PQFP PDF資料下載
參數(shù)資料
| 型號： | KSZ8862-16MQL |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 65/125頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SWITCH 10/100 16BIT 128-PQFP |
| 標(biāo)準(zhǔn)包裝： | 66 |
| 系列： | KSZ8862 |
| 控制器類型： | 以太網(wǎng)開關(guān)控制器 |
| 接口： | PCI |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 128-PQFP（14x20） |
| 包裝： | 托盤 |
| 配用： | 576-1638-ND - BOARD EVALUATION KSZ8862-10FL 576-1637-ND - BOARD EVALUATION KSZ8862-100FX |
| 其它名稱： | 576-1564 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁當(dāng)前第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁
Micrel, Inc.
KSZ8862-16/32MQL
April 2007
44
M9999-040407-3.0
Figure 11 illustrates how the 802.1p priority field is embedded in the 802.1Q VLAN tag.
TCI
76
6
2
length
Data
FCS
2
46-1500
4
Tagged Packet Type
(8100 for Ethernet)
802
802....1
11
1p
pp
p
VLAN ID
Bytes
Bits
16
3
12
802.1q VLAN Tag
2
SA
VPID
Preamble
DA
1
CF
I
1
SFD
Figure 11. 802.1p Priority Field Format
802.1p-based priority is enabled by bit 5 of registers P1CR1, P2CR1, and P3CR1 for ports 1, 2, and the host port,
respectively.
The KSZ8862M provides the option to insert or remove the priority tagged frame's header at each individual egress port.
This header, consisting of the 2 bytes VLAN protocol ID (VPID) and the 2 bytes tag control information field (TCI), is also
referred to as the 802.1Q VLAN tag.
Tag insertion is enabled by bit 2 of registers P1CR1, P2CR1, and P3CR1 for ports 1, 2, and the host port, respectively.
At the egress port, untagged packets are tagged with the ingress port’s default tag. The default tags are programmed in
register sets P1VIDCR, P2VIDCR, and P3VIDCR for ports 1, 2 and the host port, respectively. The KSZ8862M does not
add tags to already tagged packets.
Tag removal is enabled by bit 1 of registers P1CR1, P2CR1, and P3CR1 for ports 1, 2, and the host port, respectively. At
the egress port, tagged packets will have their 802.1Q VLAN Tags removed. The KSZ8862M will not modify untagged
packets.
The CRC is recalculated for both tag insertion and tag removal.
802.1p priority field re-mapping is a QoS feature that allows the KSZ8862M to set the “User Priority Ceiling” at any
ingress port. If the ingress packet’s priority field has a higher priority value than the default tag’s priority field of the ingress
port, the packet’s priority field is replaced with the default tag’s priority field. The “User Priority Ceiling” is enabled by bit 3
of registers P1CR2, P2CR2, and P3CR2 for ports 1, 2, and the host port, respectively.
DiffServ-Based Priority
DiffServ-based priority uses the ToS registers shown in the Priority Control Registers section. The ToS priority control
registers implement a fully decoded, 128-bit Differentiated Services Code Point (DSCP) register to determine packet
priority from the 6-bit ToS field in the IP header. When the most significant 6 bits of the ToS field are fully decoded, the
resultant of the 64 possibilities is compared with the corresponding bits in the DSCP register to determine priority.
Rate Limiting Support
The KSZ8862M supports hardware rate limiting from 64 Kbps to 88 Mbps, independently on the “receive side” and on the
“transmit side” on a per port basis. For 10-base T, a rate setting above 10 Mbps means the rate is not limited. On the
receive side, the data receive rate for each priority at each port can be limited by setting up Ingress Rate Control
Registers. On the transmit side, the data transmit rate for each priority queue at each port can be limited by setting up
Egress Rate Control Registers. The size of each frame has options to include minimum IFG (Inter Frame Gap) or
Preamble byte, in addition to the data field (from packet DA to FCS).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KSZ8862-32MQL | IC ETHERNET SW 2PORT BUS 128PQFP |
| KSZ8863MLLI | IC ETHERNET SWITCH 3PORT 48-LQFP |
| KSZ8864RMNI | IC ETHERNET SWITCH 4PORT 64QFN |
| KSZ8873FLLI | IC ETHERNET SWITCH 3PORT 64LQFP |
| KSZ8873MLLJ | IC ETHERNET SWITCH 3PORT 64LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8862-16MQL-FX | 功能描述:以太網(wǎng) IC 2-Port Ethernet Switch/Repeater + Generic (16-bit) bus interface. Fiber Capabilities on Port-1(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8862-32MQL | 功能描述:以太網(wǎng) IC 2-Port Ethernet Switch/Repeater + Generic (32-bit) bus interface. Fiber Capabilities on Port-1(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8862-32MQL-FX | 功能描述:以太網(wǎng) IC 2-Port Ethernet Switch/Repeater + Generic (32-bit) bus interface. Fiber Capabilities on Port-1(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8862-MQL | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2-Port Ethernet Switch with Non-PCI Interface and Fiber Support |
| KSZ8863FLL | 功能描述:以太網(wǎng) IC 3-Port 10/100 Ethernet Switch with 1x FX Port and 1x TX Port (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。