參數(shù)資料
型號： KSZ8851-16MLLJ
廠商： Micrel Inc
文件頁數(shù)： 67/90頁
文件大?。?/td> 0K
描述： IC CTLR MAC 1PORT NON-PCI 48LQFP
標準包裝： 250
控制器類型： 以太網(wǎng)控制器，MAC/PHY
接口： 總線
電源電壓： 1.8V，2.5V，3.3V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應商設備封裝： 48-LQFP（7x7）
包裝： 托盤
其它名稱： 576-3629
KSZ8851-16MLLJ-ND
Micrel, Inc.
KSZ8851-16MLLJ
March 2010
7
M9999-030210-1.0
RX Duration Timer Threshold Register (0x8C – 0x8D): RXDTTR ............................................................................... 62
RX Data Byte Count Threshold Register (0x8E – 0x8F): RXDBCTR .......................................................................... 63
Interrupt Enable Register (0x90 – 0x91): IER .............................................................................................................. 63
Interrupt Enable Register (0x90 – 0x91): IER (Continued) .......................................................................................... 64
Interrupt Status Register (0x92 – 0x93): ISR ............................................................................................................... 64
Interrupt Status Register (0x92 – 0x93): ISR (Continued) ........................................................................................... 65
RX Frame Count & Threshold Register (0x9C – 0x9D): RXFCTR............................................................................... 65
TX Next Total Frames Size Register (0x9E – 0x9F): TXNTFSR ................................................................................. 65
MAC Address Hash Table Register 0 (0xA0 – 0xA1): MAHTR0.................................................................................. 66
MAC Address Hash Table Register 1 (0xA2 – 0xA3): MAHTR1.................................................................................. 66
MAC Address Hash Table Register 2 (0xA4 – 0xA5): MAHTR2.................................................................................. 66
MAC Address Hash Table Register 3 (0xA6 – 0xA7): MAHTR3.................................................................................. 66
Flow Control Low Watermark Register (0xB0 – 0xB1): FCLWR.................................................................................. 67
Flow Control High Watermark Register (0xB2 – 0xB3): FCHWR ................................................................................ 67
Flow Control Overrun Watermark Register (0xB4 – 0xB5): FCOWR........................................................................... 67
0xB6 – 0xBF: Reserved................................................................................................................................................ 67
Chip ID and Enable Register (0xC0 – 0xC1): CIDER .................................................................................................. 67
Chip Global Control Register (0xC6 – 0xC7): CGCR................................................................................................... 68
Indirect Access Control Register (0xC8 – 0xC9): IACR ............................................................................................... 68
Indirect Access Data Low Register (0xD0 – 0xD1): IADLR ......................................................................................... 68
Indirect Access Data High Register (0xD2 – 0xD3): IADHR ........................................................................................ 69
Power Management Event Control Register (0xD4 – 0xD5): PMECR......................................................................... 69
Power Management Event Control Register (0xD4 – 0xD5): PMECR (Continued)..................................................... 70
Go-Sleep & Wake-Up Time Register (0xD6 – 0xD7): GSWUTR ................................................................................. 70
PHY Reset Register (0xD8 – 0xD9): PHYRR .............................................................................................................. 70
PHY 1 MII-Register Basic Control Register (0xE4 – 0xE5): P1MBCR......................................................................... 71
PHY 1 MII-Register Basic Status Register (0xE6 – 0xE7): P1MBSR .......................................................................... 72
PHY 1 PHY ID Low Register (0xE8 – 0xE9): PHY1ILR ............................................................................................... 72
PHY 1 PHY ID High Register (0xEA – 0xEB): PHY1IHR ............................................................................................. 73
PHY 1 Auto-Negotiation Advertisement Register (0xEC – 0xED): P1ANAR ............................................................... 73
PHY 1 Auto-Negotiation Link Partner Ability Register (0xEE – 0xEF): P1ANLPR....................................................... 74
Port 1 PHY Special Control/Status, LinkMD (0xF4 – 0xF5): P1SCLMD ...................................................................... 74
Port 1 PHY Special Control/Status, LinkMD (0xF4 – 0xF5): P1SCLMD (Continued) .................................................. 75
Port 1 Control Register (0xF6 – 0xF7): P1CR.............................................................................................................. 75
Port 1 Control Register (0xF6 – 0xF7): P1CR (Continued) .......................................................................................... 76
Port 1 Status Register (0xF8 – 0xF9): P1SR ............................................................................................................... 77
MIB (Management Information Base) Counters............................................................................................................... 78
Example:....................................................................................................................................................................... 80
1. MIB Counter Read (read port 1 “Rx64Octets” counter at indirect address offset 0x0E).........................................80
Additional MIB Information ........................................................................................................................................... 80
Absolute Maximum Ratings(1) ............................................................................................................................................ 81
Operating Ratings
(2) ............................................................................................................................................................ 81
Electrical Characteristics
(4, 5).............................................................................................................................................. 81
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KSZ8851-16MLLJ_10 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface
KSZ8851-16MLLU 功能描述:以太網(wǎng) IC Single-Port Ethernet Controller (Automotive Grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8851-16MLLU TR 功能描述:以太網(wǎng) IC Single-Port Ethernet Controller (Automotive Grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8851-16MQL 功能描述:以太網(wǎng) IC Single Ethernet Port + Generic (16-bit) Bus Interface(Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8851-16MQL-EVAL 功能描述:以太網(wǎng)開發(fā)工具 Single Ethernet Port + Generic (16-bit) Bus Interface(Lead Free) Eval Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
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