參數(shù)資料
型號: KSZ8851-16MLLJ
廠商: Micrel Inc
文件頁數(shù): 59/90頁
文件大?。?/td> 0K
描述: IC CTLR MAC 1PORT NON-PCI 48LQFP
標準包裝: 250
控制器類型: 以太網(wǎng)控制器,MAC/PHY
接口: 總線
電源電壓: 1.8V,2.5V,3.3V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應商設備封裝: 48-LQFP(7x7)
包裝: 托盤
其它名稱: 576-3629
KSZ8851-16MLLJ-ND
Micrel, Inc.
KSZ8851-16MLLJ
March 2010
62
M9999-030210-1.0
RX Frame Data Pointer Register (0x86 – 0x87): RXFDPR
The value of this register determines the address to be accessed within the RXQ frame buffer. When the Auto Increment
is set, it will automatically increment the RXQ Pointer on read accesses to the data register.
The counter is incremented is by one for every byte access, by two for every word access, and by four for every double
word access.
Bit
Default Value
R/W
Description
15
-
RO
Reserved.
14
0x0
RW
RXFPAI RX Frame Pointer Auto Increment
When this bit is set, the RXQ Address register increments automatically on accesses to
the data register. The increment is by one for every byte access, by two for every word
access, and by four for every double word access.
When this bit is reset, the RX frame data pointer is manually controlled by user to access
the RX frame location.
13
-
RO
Reserved.
12
0x0
RW
WST Write Sample Time
This bit is used to select the WRN active to write data valid time as shown in Figure 11.
0: WRN active to write data valid sample time is range of 8nS (min) to 16nS (max).
1: WRN active to write data valid sample time is 4nS (max).
11
0x0
WO
(Read
back is
“0”)
EMS Endian Mode Selection
This bit is used to select either Big or Little Endian mode when Endian mode select
strapping pin (10) is NC or tied to GND.
0: is set to Little Endian Mode
1: is set to Big Endian Mode
10-0
0x000
WO
RXFP RX Frame Pointer
RX Frame data pointer index to the Data register for access.
This pointer value must reset to 0x000 before each DMA operation from the host CPU to
read RXQ frame buffer.
0x88 – 0x8B: Reserved
RX Duration Timer Threshold Register (0x8C – 0x8D): RXDTTR
This register is used to program the received frame duration timer threshold.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
RXDTT Receive Duration Timer Threshold
To program received frame duration timer threshold value in 1us interval. The maximum
value is 0xCFFF.
When bit 7 set to 1 in RXQCR register, the KSZ8851-16MLLJ will set RX interrupt (bit 13
in ISR) after the time starts at first received frame in RXQ buffer and exceeds the
threshold set in this register.
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