參數(shù)資料
型號: KSZ8695X-EVAL
廠商: Micrel Inc
文件頁數(shù): 9/39頁
文件大?。?/td> 0K
描述: KIT EVAL KSZ8695X EXPERIMENT
標(biāo)準(zhǔn)包裝: 1
主要目的: 接口,以太網(wǎng) PHY
嵌入式:
已用 IC / 零件: KSZ8695X
主要屬性: 單芯片網(wǎng)關(guān)解決方案
已供物品:
相關(guān)產(chǎn)品: 576-1025-ND - IC SWITCH 10/100 5PORT 208PQFP
其它名稱: 576-1624
Micrel, Inc.
KS8695X
June 2006
17
M9999-060106
Reset
The KS8695X has a single reset input that can be driven by a system reset circuit or a simple power on reset circuit. The
KS8695X also features a reset output (WRSTO) that can be used to reset other devices in the system. WRSTO can be
configured as either an active high reset or an active low reset through a strap-in option on pin 85 as shown in Table 1.
The KS8695X also has a built in watchdog timer. Once the user programs the watchdog timer and the timer setting
expires, the KS8695X will reset itself and also assert WRSTO to reset the other devices in the system. Figure 3 shows a
typical system that uses the KS8695X WRSTO as the system reset.
Figure 3. Example of a Reset Circuit
System Clock
The clock to the KS8695X can be supplied by either a 25MHz ±50ppm crystal or by an oscillator. If an oscillator is used it
shall be connected to the X1 input (pin 150) on the KS8695X. If a crystal is used, it shall be connected with a circuit like
the one shown below. The 25MHz input clock is used by an internal PLL to generate the programmable SDOCLK.
SDOCLK is the system clock, and can be programmed from 25MHz to 125MHz using system clock and bus control
register at offset 0x0004. The CPUCLKSEL strap-in option on pin 96 needs to be pulled low for normal operation.
Figure 4. Typical Clock Circuit
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