參數(shù)資料
型號: KP80524NY450128
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 30/81頁
文件大小: 598K
代理商: KP80524NY450128
Mobile Intel
Celeron Processor (0.18μ) in BGA2 and Micro-PGA2 Packages
Datasheet
Order Number#249563-001
30
Table 17. Reset Configuration AC Specifications
T
J
= 0°C to 100°C; V
CC
= 1.10V ±80 mV or 1.35V ±100 mV or 1.60V ±115 mV; V
CCT
= 1.50V ±115 mV
Symbol
Parameter
Min Max Unit
Figure
Figure 8.
Figure 9
Notes
T16
Reset Configuration Signals (A[15:5]#, BREQ0#,
FLUSH#, INIT#, PICD0) Setup Time
4
BCLKs
Before
deassertion of
RESET#
T17
Reset Configuration Signals (A[15:5]#, BREQ0#,
FLUSH#, INIT#, PICD0) Hold Time
2
20
BCLKs
Figure 8.
Figure 9
After clock that
deasserts
RESET#
T18
RESET#/PWRGOOD Setup Time
1
ms
Figure 10 Before
deassertion of
RESET#
NOTE:
At least 1 ms must pass after PWRGOOD rises above V
IH25,min
from Table 12 and BCLK meets its
AC timing specification until RESET# may be deasserted.
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