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參數(shù)資料
| 型號： | KMM5328100CK |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 8M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V |
| 中文描述： | 8米× 32的DRAM上海藥物研究所利用4Mx4，4K/2K刷新，5V的 |
| 文件頁數(shù)： | 4/15頁 |
| 文件大?。?/td> | 271K |
| 代理商： | KMM5328100CK |
DRAM MODULE
KMM5328100CK/CKG
KMM5328000CK/CKG
CAPACITANCE
(T
A
= 25
é
, V
CC
=5V, f = 1MHz)
Item
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
C
DQ
Min
Max
100
130
70
30
20
Unit
pF
pF
pF
pF
pF
Input capacitance[A0-A11(A10)]
Input capacitance[W]
Input capacitance[RAS0, RAS1]
Input capacitance[CAS0 - CAS3]
Input/Output capacitance[DQ0-31]
-
-
-
-
-
Test condition : V
ih
/V
il
=2.4/0.8V, V
oh
/V
ol
=2.4/0.4V, Output loading CL=100pF
Parameter
Symbol
-5
-6
Unit
Note
Min
90
Max
Min
110
Max
Random read or write cycle time
Access time from RAS
Access time from CAS
Access time from column address
CAS to output in Low-Z
Output buffer turn-off delay
Transition time(rise and fall)
RAS precharge time
RAS pulse width
RAS hold time
CAS hold time
CAS pulse width
RAS to CAS delay time
RAS to column address delay time
CAS to RAS precharge time
Row address set-up time
Row address hold time
Column address set-up time
Column address hold time
Column address to RAS lead time
Read command set-up time
Read command hold time referenced to CAS
Read command hold time referenced to RAS
Write command hold time
Write command pulse width
Write command to RAS lead time
Write command to CAS lead time
Data-in set-up time
Data-in hold time
Refresh period (4K Ref)
Refresh period (2K Ref)
Write command set-up time
CAS setup time(CAS-before-RAS refresh)
CAS hold time(CAS-before-RAS refresh)
RAS precharge to CAS hold time
t
RC
t
RAC
t
CAC
t
AA
t
CLZ
t
OFF
t
T
t
RP
t
RAS
t
RSH
t
CSH
t
CAS
t
RCD
t
RAD
t
CRP
t
ASR
t
RAH
t
ASC
t
CAH
t
RAL
t
RCS
t
RCH
t
RRH
t
WCH
t
WP
t
RWL
t
CWL
t
DS
t
DH
t
REF
t
REF
t
WCS
t
CSR
t
CHR
t
RPC
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
ns
ns
ns
ns
50
13
25
60
15
30
3,4
3,4,5
3,10
3
6
2
0
0
3
0
0
3
13
50
15
50
30
50
13
50
13
20
15
5
0
10
0
10
25
0
0
0
10
10
13
13
0
10
40
60
15
60
15
20
15
5
0
10
0
10
30
0
0
0
10
10
15
15
0
15
10K
10K
10K
37
25
10K
45
30
4
10
8
8
9
9
64
32
64
32
0
5
0
5
7
10
5
10
5
AC CHARACTERISTICS
(0
°
C
≤
T
A
≤
70
°
C, V
CC
=5.0V
±
10%. See notes 1,2.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KMM5328000BSW | 4M x 32 DRAM SIMM Using 4Mx16, 4K Refresh, 5V |
| KMM5328100CKG | IND 4922-31L API DELEVAN T/R 1 |
| KMM5328000CKG | 8M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V |
| KMM5328004BSWG | 8M x 32 DRAM SIMM Using 4Mx16, 4K Refresh, 5V |
| KMM5328004CSWG | 8M x 32 DRAM SIMM Using 4Mx16, 4K Refresh, 5V |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KMM5328100CKG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V |
| KMM5361203C2W | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 36 DRAM SIMM using 1Mx16 and 1Mx4 Quad CAS, 1K Refresh |
| KMM5361203C2WG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 36 DRAM SIMM using 1Mx16 and 1Mx4 Quad CAS, 1K Refresh |
| KMM5361205C2W | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh |
| KMM5361205C2WG | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 36 DRAM SIMM using 1Mx16 and 4M Quad CAS EDO, 1K Refresh |
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