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參數(shù)資料
| 型號： | KM29W32000T |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 4M x 8 Bit NAND Flash Memory(4M x 8 位 NAND閃速存儲器) |
| 中文描述： | 4米× 8位NAND閃存（4米× 8位的NAND閃速存儲器） |
| 文件頁數(shù)： | 22/26頁 |
| 文件大?。?/td> | 316K |
| 代理商： | KM29W32000T |
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KM29W32000T, KM29W32000IT
FLASH MEMORY
22
Figure 8. Block Erase Operation
BLOCK ERASE
The Erase operation can erase on a block(8K Byte) basis. Block address loading is accomplished in two cycles initiated by an Era se
Setup command(60H). Only address A
13
to A
21
is valid while A
9
to A
12
is ignored. The addresses of the block to be erased to FFH.
The Erase Confirm command(D0H) following the block address loading initiates the internal erasing process. This two-step
sequence of setup followed by execution ensures that memory contents are not accidentally erased due to external noise condition s.
At the rising edge of WE after the erase confirm command input, the internal write controller handles erase, erase-verify and pulse
repetition where required. If an erase operation error is detected, the internal verify is halted and erase operation is termina ted. When
the erase operation is completed, the Write Status Bit(I/O
0
) may be checked.
Figure 8 details the sequence.
60H
Block Add. : A
9
~ A
21
I/O
0
~
7
R/B
Address Input(2Cycle)
I/O
0
Pass
D0H
70H
Fail
ERASE SUSPEND/ERASE RESUME
The Erase Suspend allows interruption during any erase operation in order to read or program data to or from another block of
memory. Once an erase process begins, writing the Erase Suspend command (B0H) to the command register suspends the internal
erase process, and the R/B signal return to "1". Erase Suspend Status bit will be also set to "1" when the Status Register is read. At
this time, blocks other than the suspended block can be read or programmed. The Status Register and R/ B operation will function as
usual. After the Erase Resume command is written to it, the erase process is restarted from the beginning of the erasing period. The
Erase Suspend Status bit and R/ B will return to "0". Refer to Figure 9 for operation sequence.
Figure 9. Erase Suspend & Erase Resume Operation
I/O
0
~
7
R/B
D0H
60H
B0H
Block Address input
Erase Function
Start
Erase Function
Suspend
Erase Function
Resume
D0H
t
BERS
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