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| 型號(hào)： | JZ48F4L0QTZ |
| 廠商： | Intel Corp. |
| 英文描述： | StrataFlash Wireless Memory |
| 中文描述： | 無(wú)線的StrataFlash存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 85/106頁(yè) |
| 文件大?。?/td> | 1272K |
| 代理商： | JZ48F4L0QTZ |
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Intel StrataFlash Wireless Memory (L18)
Datasheet
Intel StrataFlash Wireless Memory (L18)
Order Number: 251902, Revision: 009
April 2005
85
Appendix B Flowcharts
Figure 39.
Word Program Flowchart
Program
Suspend
Loop
Start
Write 0x40,
Word Address
Write Data,
Word Address
Read Status
Register
SR[7] =
Full Status
Check
(if desired)
Program
Complete
Suspend
1
0
No
Yes
WORD PROGRAM PROCEDURE
Repeat for subsequent Word Program operations.
Full Status Register check can be done after each program, or
after a sequence of program operations.
Write 0xFF after the last operation to set to the Read Array
state.
Comments
OpBus
Data = 0x40
Addr = Location to program
Write
Program
Setup
Data = Data to program
Addr = Location to program
Write
Data
Status register data
Read
None
Check SR[7]
1 = WSM Ready
0 = WSM Busy
Idle
None
(Setup)
(Confirm)
FULL STATUS CHECK PROCEDURE
Read Status
Register
Program
Successful
SR[3] =
SR[1] =
0
0
SR[4] =
0
1
1
1
V
PP
Range
Error
Device
Protect Error
Program
Error
If an error is detected, clear the Status Register before
continuing operations - only the Clear Staus Register
command clears the Status Register error bits.
Idle
Idle
Bus
Operation
None
None
Command
Check SR[3]:
1 = V
PP
Error
Check SR[4]:
1 = Data Program Error
Comments
Idle
None
Check SR[1]:
1 = Block locked; operation aborted
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