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參數(shù)資料
| 型號： | ISPPAC30-01SI |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | In-System Programmable Analog Circuit |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封裝： | SOIC-24 |
| 文件頁數(shù)： | 4/30頁 |
| 文件大小： | 379K |
| 代理商： | ISPPAC30-01SI |
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Lattice Semiconductor
ispPAC30 Preliminary Data Sheet
4
Electrical Characteristics, Continued
TA = 25°C; V
MDAC2 connected to OA2. V
wise speci
fi
ed).
S
= 5.0V; 0V < V
IN
< 2.8V; Gain = 1; Output load = 50pf, 1k
biased to swing from 0.5 to 4.5V. Auto-Cal initiated immediately prior. (Unless other-
. IA1, IA2, MDAC1 connected to OA1 and IA3, IA4,
OUT
Symbol
Digital I/O (Continued)
I
IL
, I
IH
Parameter
Condition
Min.
Typ.
Max.
Units
Input Leakage Current
No pull-up/pull-down
With pull-up/pull-down (8)
Schmitt Trigger
I
OL
= 4.0mA
I
OH
= -1.0mA
10
±50
μ
A
A
μ
mV
V
V
Hysteresis
Output Low Voltage (TDO)
Output High Voltage (TDO)
250
V
V
OL
0.4
OH
2.4
Programming and Calibration
Erase/Reprogram Cycles
Calibration Cycle Time
For E
2
CMOS cells
Initial turn on
Subsequent user initiated
10K
1M
140
50
cycles
ms
250
100
Power Supplies
V
S
I
S
P
D
Operating Supply Voltage
Supply Current (8)
Power Dissipation (9)
Power Down Supply Current
Wakeup Time
4.75
5
5.25
15
75
30
5.0
V
V
S
= 5.0V
V
S
= 5.0V
V
S
= 5.0V
10
50
10
3.5
mA
mW
μ
A
μ
s
Time to resume normal operation
Temperature Range
Operation
Storage
-40
-65
85
150
°
C
°
C
Notes:
1. Inputs larger than this will be clipped.
2. Inputs can be used fully differential if care is taken to offset signals so as to not force the outputs below 0V or above V
S
. The total input
swing is measured from one differential extreme, with respect to polarity, to the other, or twice the peak single-ended input range.
3. To insure full spec performance, an auto-calibration should be performed after initial turn-on when the device reaches thermal stability.
4. For all gains except G=1, output is assumed to be driven to 5V by the input signal level (V
IN
x Gain = 5V). When G=1, the maximum single
ended input possible is 2.8V. The consequence is an output of 2.8V instead of 5V. Computed SNR is then 5dB less because of the lower
effective signal. With a true differential 2.5V input and G=1, output will again be a full 5V and SNR will be equal to the value shown in the
speci
fi
cation table.
5. V
IN+
and V
IN-
are connected together for this test.
6. Measured between analog outputs, with an identical signal path con
fi
guration used for each. One channel is driven with a 10kHz signal and
the other is not (input grounded).
7. Computed 3db corner frequencies are 619kHz, 401kHz, 250kHz, 169kHz, 114kHz, 74kHz and 49kHz. Actual values found in PAC-
Designer software.
8. Logic inputs will exhibit positive current con
fi
gured with a pull-down and negative current with a pull-up.
9. Con
fi
gured so all internal circuitry is powered on.
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|---|---|
| ISPPAC80-01PI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC80-01SI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC81 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit |
| ISPPAC81-01PI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC81-01SI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
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