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參數(shù)資料
| 型號(hào)： | ISPPAC30-01SI |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號(hào)調(diào)理 |
| 英文描述： | In-System Programmable Analog Circuit |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封裝： | SOIC-24 |
| 文件頁數(shù)： | 24/30頁 |
| 文件大?。?/td> | 379K |
| 代理商： | ISPPAC30-01SI |
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Lattice Semiconductor
ispPAC30 Preliminary Data Sheet
24
In-System Programming
The ispPAC30 is an in-system programmable device. This is accomplished by integrating all E
2
con
fi
guration mem-
ory and SRAM control logic on-chip. Programming is performed through a 4-wire, IEEE 1149.1 compliant serial
JTAG interface at normal logic levels. Once a device is programmed, all con
fi
guration information is stored on-chip,
in non-volatile E
2
CMOS memory cells. The speci
fi
cs of the IEEE 1149.1 serial interface and all ispPAC30 instruc-
tions are described in the JTAG interface section of this data sheet.
User Electronic Signature
A user electronic signature (UES) feature is included in the E
2
CMOS memory of the ispPAC30. This consists of 16
bits that can be con
fi
gured by the user to store unique data such as ID codes, revision numbers or inventory control
data. The speci
fi
cs this feature are discussed in the IEEE 1149.1 serial interface section of this data sheet.
Electronic Security
An electronic security “fuse” (ESF) bit is provided in every ispPAC30 device to prevent unauthorized readout of the
E
2
CMOS con
fi
guration bit patterns. Once programmed, this cell prevents further access to the functional user bits
in the device. This cell can only be erased by reprogramming the device, so the original con
fi
guration can not be
examined once programmed. Usage of this feature is optional. The speci
fi
cs of this feature are discussed in the
IEEE 1149.1 serial interface section of this data sheet.
Production Programming Support
Once a
fi
nal con
fi
guration is determined, an ASCII format JEDEC
fi
le can be created using the PAC-Designer soft-
ware. Devices can then be ordered through the usual supply channels with the user’s speci
fi
c con
fi
guration already
preloaded into the devices. By virtue of its standard interface, compatibility is maintained with existing production
programming equipment, giving customers a wide degree of freedom and
fl
exibility in production planning.
Evaluation Fixture
Included in the basic ispPAC30 Design Kit is an engineering prototype board that can be connected to the parallel
port of a PC using a Lattice download cable. It demonstrates proper layout techniques for the ispPAC30 and can be
used in real time to check circuit operation as part of the design process. Input and output connections as well as a
“breadboard” circuit area are provided to speed debugging of the circuit. This board is also useful as a program-
ming
fi
xture for prototype and short production runs.
Figure 8. Download to a PC
IEEE Standard 1149.1 Interface
Serial Port Programming Interface Communication with the ispPAC30 is facilitated via an IEEE 1149.1 test access
port (TAP). It is used by the ispPAC30 as a serial programming interface, and not for boundary scan test purposes.
ispDownload
Cable (6')
4
Other
System
Circuitry
ispPAC30
Device
PAC-Designer
Software
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| ISPPAC80-01PI | 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC80-01SI | 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC81 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit |
| ISPPAC81-01PI | 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC81-01SI | 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24 |
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