參數(shù)資料
型號(hào): ISP1161A
廠商: NXP Semiconductors N.V.
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: 全速通用串行總線的單芯片主機(jī)和設(shè)備控制器
文件頁數(shù): 11/134頁
文件大?。?/td> 587K
代理商: ISP1161A
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
11 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7.
Functional description
7.1 PLL clock multiplier
A 6 MHz to 48 MHz clock multiplier Phase-Locked Loop (PLL) is integrated on-chip.
This allows for the use of a low-cost 6 MHz crystal, which also minimizes EMI. No
external components are required for the operation of the PLL.
7.2 Bit clock recovery
The bit clock recovery circuit recovers the clock from the incoming USB data stream
using a 4 times over-sampling principle. It is able to track jitter and frequency drift as
specified in the Universal Serial Bus Specification Rev. 2.0
7.3 Analog transceivers
Three sets of transceivers are embedded in the chip: two are used for downstream
ports with USB connector type A; one is used for upstream port with USB connector
type B. The integrated transceivers are compliant with the Universal Serial Bus
Specification Rev. 2.0 They interface directly with the USB connectors and cables
through external termination resistors.
7.4 Philips Serial Interface Engine (SIE)
The Philips SIE implements the full USB protocol layer. It is completely hardwired for
speed and needs no firmware intervention. The functions of this block include:
synchronization pattern recognition, parallel to serial conversion, bit (de)stuffing,
CRC checking and generation, Packet IDentifier (PID) verification and generation,
address recognition, handshake evaluation and generation. There are separate SIEs
in both the HC and the DC.
7.5 SoftConnect
The connection to the USB is accomplished by bringing D
+
(for full-speed USB
devices) HIGH through a 1.5 k
pull-up resistor. In the ISP1161A DC, the 1.5 k
pull-up resistor is integrated on-chip and is not connected to V
CC
by default. The
connection is established through a command sent by the external or system
microcontroller. This allows the system microcontroller to complete its initialization
sequence before deciding to establish connection with the USB. Re-initialization of
the USB connection can also be performed without disconnecting the cable.
The ISP1161A DC will check for USB V
BUS
availability before the connection can be
established. V
BUS
sensing is provided through pin D_VBUS.
Remark:
The tolerance of the internal resistors is 25 %. This is higher than the 5 %
tolerance specified by the USB specification. However, the overall voltage
specification for the connection can still be met with a good margin. The decision to
make use of this feature lies with the USB equipment designer.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1161A1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus single-chip host and device controller
ISP1161A1BD 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
ISP1161A1BD,118 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,151 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,157 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20