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參數(shù)資料
| 型號(hào)： | ISL5216KI |
| 廠商： | INTERSIL CORP |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | Four-Channel Programmable Digital DownConverter |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA196 |
| 封裝： | 12 X 12 MM, 0.80 MM PITCH, PLASTIC, BGA-196 |
| 文件頁數(shù)： | 42/65頁 |
| 文件大?。?/td> | 1384K |
| 代理商： | ISL5216KI |
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TABLE 28. SERIAL DATA OUTPUT 2 CONTENT/FORMAT REGISTER 1 (IWA = *017h)
P(31:0)
FUNCTION
31:24
Fourth serial slot in Serial Data Output 2 (SD2x). x = A, B, C or D. See bits 7:0 of Table 26 for functional description of bits 23:16.
23:16
Third serial slot in Serial Data Output 2 (SD2x). x = A, B, C or D. See bits 7:0 of Table 26 for functional description of bits 23:16.
15:8
Second serial slot in Serial Data Output 2 (SD2x). x = A, B, C or D. See bits 7:0 of Table 26 for functional description of bits 15:8.
7:0
First serial slot in Serial Data Output 2 (SD2x). x = A, B, C or D. See bits 7:0 of Table 26 for functional description of bits 7:0.
TABLE 29. SERIAL DATA OUTPUT 2 CONTENT/FORMAT REGISTER 2 (IWA = *018h)
P(31:0)
FUNCTION
31:24
Set to zero
23:16
Seventh serial slot in Serial Data Output 2 (SD2x). x = A, B, C or D. See bits 7:0 of Table 26 for functional description of bits 23:16.
15:8
Sixth serial slot in Serial Data Output 2 (SD2x). x = A, B, C or D. See bits 7:0 of Table 26 for functional description of bits 15:8.
7:0
Fifth serial slot in Serial Data Output 2 (SD2x). x = A, B, C or D. See bits 7:0 of Table 26 for functional description of bits 7:0.
TABLE 30. SOFTWARE RESET REGISTER (IWA = *019h)
P(15:0)
FUNCTION
N/A
Writing to this location resets the following activities of the functional block indicated.
Input Format/Select, NCO, Mixer and CIC.
Clears any pending enable in each channel's input demultiplexer function, loads the CIC decimation counter (the load value
is indeterminate if the decimation counter preload register has not been loaded), clears all processing enables (stops all
processing in the data path, but does not clear the data path registers).
Filter Compute Engine:
Resets the Read/Write pointers, fetch instruction 31 and start the filter program execution.
AGC:
Resets the compute blocks in both the forward and loop filter blocks (any calculations in progress are lost).
Cartesian-to-Polar Coordinate Converter:
Resets the compute blocks (any calculations in progress are lost).
FIFO:
Resets counter (clears the FIFO, all data is lost).
Resampler Timing NCO:
Clears the slave (active) frequency registers and clears the phase accumulator.
Output Section:
Resets the serial output section (clears all registers, counters, and flags but does not clear the configuration registers).
Self Test Control:
Resets the self test control logic of the front end (Input Format/Select, NCO, Mixer, and CIC) and the back end (Filter Compute
Engine, AGC, and Cartesian-to-Polar Coordinate Converter).
TABLE 31. CHANNEL TIMING ADVANCE STROBE REGISTER (IWA = *01Ah)
P(15:0)
FUNCTION
N/A
Writing to this location inserts one extra data sample in the CIC to FIR path by repeating a sample. Used for shifting the FIR filter
compute engine timing.
TABLE 32. CHANNEL TIMING RETARD STROBE Register (IWA = *01Bh)
P(15:0)
FUNCTION
N/A
Writing to this location deletes one data sample in the CIC to FIR path. Used for shifting the FIR filter compute engine timing.
TABLE 33. CARRIER PHASE OFFSET (IWA = *01Ch)
P(15:0)
FUNCTION
15:0
Carrier phase offset. Values of 0000H - FFFFH in this register represent phase shifts of 0 to 65535 / 65536 * 360 degrees (this value
may also be interpreted as a signed integer, in which case the range 8000H - 7FFFH corresponds to phase shifts of -180 to 32767
/ 32768 * 180 degrees). For the HSP50216 backward compatibility, the original 3-bit phase offset (IWA *004 bits 8:6) is added to the
new 16-bit phase offset register. HSP50216 configurations use IWA *004. New configurations should set *004 bits 8:6 to zero and
use this register. This register is set to 0 by the reset pin.
ISL5216
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL5216 | Four-Channel Programmable Digital DownConverter |
| ISL5217EVAL1 | Quad Programmable Up Converter |
| ISL5217KI | Quad Programmable Up Converter |
| ISL5217 | Quad Programmable Up Converter |
| ISL5217KIZ | Quad Programmable Up Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL5216KI-1 | 功能描述:上下轉(zhuǎn)換器 QUAD DIGITAL DOWNCONVERTER,IND TEMP,1.OMM PITCH BGA PACKAG RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| ISL5216KI-1Z | 功能描述:上下轉(zhuǎn)換器 W/ANL QD DIG DWNCNVRTR 1 OM PITCH RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| ISL5216KIZ | 功能描述:上下轉(zhuǎn)換器 W/ANNEAL QD DIGTL DWNCNVRTR IND TEMP RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| ISL5217 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Quad Programmable Up Converter |
| ISL5217_05 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Quad Programmable Up Converter |
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