23 FN7549.2 February 26, 2014 Package Outline Drawing M8.15 8 LEAD NARROW " />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ISL26313FBZ-T7A
寤犲晢锛� Intersil
鏂囦欢闋佹暩(sh霉)锛� 16/23闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC ADC 12BIT SPI/SRL 125K 8SOIC
妯欐簴鍖呰锛� 250
浣嶆暩(sh霉)锛� 12
閲囨ǎ鐜囷紙姣忕锛夛細 125k
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 涓茶锛孲PI?
杞夋彌鍣ㄦ暩(sh霉)鐩細 1
鍔熺巼鑰楁暎锛堟渶澶э級锛� 80mW
闆诲闆绘簮锛� 鍠浕婧�
宸ヤ綔婧害锛� -40°C ~ 125°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳鍟嗚ō鍌欏皝瑁濓細 8-SOIC
鍖呰锛� 甯跺嵎 (TR)
杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� 2 鍊嬪柈绔紝鍠サ
ISL26310, ISL26311, ISL26312, ISL26313, ISL26314, ISL26315, ISL26319
23
FN7549.2
February 26, 2014
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 1/12
DETAIL "A"
TOP VIEW
INDEX
AREA
12
3
-C-
SEATING PLANE
x 45掳
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1994.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
SIDE VIEW 鈥淎
SIDE VIEW 鈥淏鈥�
1.27 (0.050)
6.20 (0.244)
5.80 (0.228)
4.00 (0.157)
3.80 (0.150)
0.50 (0.20)
0.25 (0.01)
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
0.25(0.010)
0.10(0.004)
0.51(0.020)
0.33(0.013)
8掳
0掳
0.25 (0.010)
0.19 (0.008)
1.27 (0.050)
0.40 (0.016)
1.27 (0.050)
5.20(0.205)
1
2
3
4
5
6
7
8
TYPICAL RECOMMENDED LAND PATTERN
2.20 (0.087)
0.60 (0.023)
鐩搁棞PDF璩囨枡
PDF鎻忚堪
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鐩搁棞浠g悊鍟�/鎶€琛撳弮鏁�(sh霉)
鍙冩暩(sh霉)鎻忚堪
ISL26314 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels
ISL26314FVZ 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:ISL26314FVZ 12-BIT, 125KSPS, 4-CHANNEL, DIFFERENTIAL SAR ADC - Rail/Tube
ISL26314FVZ-T 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:ISL26314FVZ 12-BIT, 125KSPS, 4-CHANNEL, DIFFERENTIAL SAR ADC - Tape and Reel
ISL26314FVZ-T7A 鍔熻兘鎻忚堪:IC ADC 12BIT SRL/SPI 16TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞夋彌鍣� 绯诲垪:- 鐢㈠搧鍩硅〒妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯欐簴鍖呰:1 绯诲垪:- 浣嶆暩(sh霉):10 閲囨ǎ鐜囷紙姣忕锛�:357k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:DSP锛孧ICROWIRE?锛孮SPI?锛屼覆琛岋紝SPI? 杞夋彌鍣ㄦ暩(sh霉)鐩�:1 鍔熺巼鑰楁暎锛堟渶澶э級:830µW 闆诲闆绘簮:鍠浕婧� 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:10-WFDFN 瑁搁湶鐒婄洡 渚涙噳鍟嗚ō鍌欏皝瑁�:10-TDFN-EP锛�3x3锛� 鍖呰:鍓垏甯� (CT) 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:2 鍊嬪柈绔�锛屽柈妤�锛�2 鍊嬪柈绔�锛岄洐妤�锛�1 鍊嬪樊鍒�锛屽柈妤�锛�1 鍊嬪樊鍒�锛岄洐妤� 鐢㈠搧鐩寗闋侀潰:1396 (CN2011-ZH PDF) 鍏跺畠鍚嶇ū:MAX1395ETB+TCT
ISL26315 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels