22 FN7549.2 February 26, 2014 Package Outline Drawing M16.173 16 LEAD THIN" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ISL26313FBZ-T7A
寤犲晢锛� Intersil
鏂囦欢闋佹暩(sh霉)锛� 15/23闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC ADC 12BIT SPI/SRL 125K 8SOIC
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 250
浣嶆暩(sh霉)锛� 12
閲囨ǎ鐜囷紙姣忕锛夛細 125k
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 涓茶锛孲PI?
杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 1
鍔熺巼鑰楁暎锛堟渶澶э級锛� 80mW
闆诲闆绘簮锛� 鍠浕婧�
宸ヤ綔婧害锛� -40°C ~ 125°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-SOIC
鍖呰锛� 甯跺嵎 (TR)
杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� 2 鍊嬪柈绔�锛屽柈妤�
ISL26310, ISL26311, ISL26312, ISL26313, ISL26314, ISL26315, ISL26319
22
FN7549.2
February 26, 2014
Package Outline Drawing
M16.173
16 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
Rev 2, 5/10
0.09-0.20
SEE DETAIL "X"
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
SIDE VIEW
END VIEW
Dimension does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
Dimensions are measured at datum plane H.
Dimensioning and tolerancing per ASME Y14.5M-1994.
Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.08mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead
is 0.07mm.
Dimension in ( ) are for reference only.
Conforms to JEDEC MO-153.
6.
3.
5.
4.
2.
1.
NOTES:
7.
(0.65 TYP)
(5.65)
(0.35 TYP)
0.90 +0.15/-0.10
0.60 卤0.15
0.15 MAX
0.05 MIN
PLANE
GAUGE
0掳-8掳
0.25
1.00 REF
(1.45)
16
2
1
3
8
B
1
3
9
A
PIN #1
I.D. MARK
5.00 卤0.10
6.40
4.40 卤0.10
0.65
1.20 MAX
SEATING
PLANE
0.25 +0.05/-0.06 5
C
H
0.20 C B A
0.10 C
-
0.05
0.10
C B A
M
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
VI-B6L-IV-F1 CONVERTER MOD DC/DC 28V 150W
VI-B6K-IV-F4 CONVERTER MOD DC/DC 40V 150W
ISL26323FBZ-T IC ADC 12BIT SPI/SRL 250K 8SOIC
IDT7207L15JG IC FIFO 16384X18 15NS 32PLCC
IDT7207L15J IC FIFO 16384X18 15NS 32PLCC
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
ISL26314 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels
ISL26314FVZ 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:ISL26314FVZ 12-BIT, 125KSPS, 4-CHANNEL, DIFFERENTIAL SAR ADC - Rail/Tube
ISL26314FVZ-T 鍒堕€犲晢:Intersil Corporation 鍔熻兘鎻忚堪:ISL26314FVZ 12-BIT, 125KSPS, 4-CHANNEL, DIFFERENTIAL SAR ADC - Tape and Reel
ISL26314FVZ-T7A 鍔熻兘鎻忚堪:IC ADC 12BIT SRL/SPI 16TSSOP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鏁�(sh霉)鎿�(j霉)閲囬泦 - 妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 绯诲垪:- 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 妯�(bi膩o)婧�(zh菙n)鍖呰:1 绯诲垪:- 浣嶆暩(sh霉):10 閲囨ǎ鐜囷紙姣忕锛�:357k 鏁�(sh霉)鎿�(j霉)鎺ュ彛:DSP锛孧ICROWIRE?锛孮SPI?锛屼覆琛�锛孲PI? 杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩�:1 鍔熺巼鑰楁暎锛堟渶澶э級:830µW 闆诲闆绘簮:鍠浕婧� 宸ヤ綔婧害:-40°C ~ 85°C 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:10-WFDFN 瑁搁湶鐒婄洡 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:10-TDFN-EP锛�3x3锛� 鍖呰:鍓垏甯� (CT) 杓稿叆鏁�(sh霉)鐩拰椤炲瀷:2 鍊嬪柈绔�锛屽柈妤�锛�2 鍊嬪柈绔�锛岄洐妤�锛�1 鍊嬪樊鍒�锛屽柈妤碉紱1 鍊嬪樊鍒�锛岄洐妤� 鐢�(ch菐n)鍝佺洰閷勯爜闈�:1396 (CN2011-ZH PDF) 鍏跺畠鍚嶇ū:MAX1395ETB+TCT
ISL26315 鍒堕€犲晢:INTERSIL 鍒堕€犲晢鍏ㄧū:Intersil Corporation 鍔熻兘鎻忚堪:12-bit, 125kSPS Low-power ADCs with Single-ended and Differential Inputs and Multiple Input Channels