10 FN7587.0 March 15, 2011 Up/Down Counter Waveforms The operation modes of the ISL24202 is shown in Table 2. Figure 11 shows the asso" />
參數(shù)資料
型號(hào): ISL24202IRTZ
廠商: Intersil
文件頁(yè)數(shù): 2/12頁(yè)
文件大?。?/td> 0K
描述: IC PROG 8BIT VCOM CALIBRTR 8TDFN
標(biāo)準(zhǔn)包裝: 100
類型: 校準(zhǔn)器
應(yīng)用: LCD 驅(qū)動(dòng)器,基準(zhǔn)電壓發(fā)生器
安裝類型: 表面貼裝
封裝/外殼: 8-WDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 8-TDFN(3x3)
包裝: 管件
ISL24202
10
FN7587.0
March 15, 2011
Up/Down Counter Waveforms
The operation modes of the ISL24202 is shown in Table 2.
Figure 11 shows the associated waveforms.
TABLE 2. ISL24202 OPERATION MODES
INPUT
OUTPUT
CTL
CE
Counter
VCOM_OUT
EEPROM
XLo
No Change
X
Lo to Hi
Ignore first CTL pulse
No Change
Hi to Mid
Hi
Decrement
Increase
No Change
Lo to Mid
Hi
Increment
Decrease
No Change
Mid to >4.9V
Hi
No Change
Write Counter
Value to EEPROM
>4.9V to Mid
Hi
Ignore next CTL Pulse
No Change
XHi to Lo
EEPROM
Read Value
Programmed
Value
No Change
CTL VDD/2
CTL LOW
CTL HIGH
CE
78
79
7A
7B
7A
COUNTER
OUTPUT
tL_MIN
tMTC
tH_REJ
FIGURE 11. COUNTER INTERFACE TIMING DIAGRAM
VCOM
tST
FIRST PULSE AFTER
ASSERTING CE IS
AFTER COUNTER ENABLE IS ASSERTED,
THE FIRST CTL PULSE IS IGNORED
EXAMPLE POST POWER-UP TIMING
NOTE:
ENABLE ADJUSTMENT
AVDD
VDD
7B
DEASSERTING CE
FROM EEPROM
ASSUME COUNTER
STARTS WITH VALUE 78
VPROG = 4.9V
tPROG
tH_MIN
7A
tL_PROP
tH_PROP
RELOADS 7B
FIRST PULSE AFTER
PROGRAMMING IS
WRITE 7B TO
EEPROM
DISABLE ADJUSTMENT
ENABLE ADJUSTMENT
tREAD
tL_REJ
IGNORED
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