參數(shù)資料
型號: IDT709279L12PFI8
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: SRAM
英文描述: 32K X 16 DUAL-PORT SRAM, 25 ns, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100
文件頁數(shù): 8/18頁
文件大?。?/td> 314K
代理商: IDT709279L12PFI8
6.42
IDT709279/69S/L
Preliminary
High-Speed 32/16K x 16 Synchronous Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
16
3243 drw 19
IDT709279/69
CE0
CE1
CE0
CE1
A15/A14(1)
CE1
CE0
VCC
IDT709279/69
Control Inputs
CNTRST
CLK
ADS
CNTEN
R/
W
OE
,
A Functional Description
The IDT709279/69 provides a true synchronous Dual-Port Static
RAM interface.Registeredinputsprovideminimalset-upandholdtimes
on address, data, and all critical control inputs. All internal registers are
clocked on the rising edge of the clock signal, however, the self-timed
internalwritepulseisindependentoftheLOWtoHIGHtransitionoftheclock
signal.
An asynchronous output enable is provided to ease asynchronous
bus interfacing. Counter enable inputs are also provided to stall the
operationoftheaddresscountersforfastinterleavedmemoryapplications.
AHIGHon CE0or a LOWon CE1foroneclockcyclewillpowerdown
the internal circuitry to reduce static power consumption. Multiple chip
enables allow easier banking of multiple IDT709279/69's for depth
expansionconfigurations.WhenthePipelinedoutputmodeisenabled,two
cycles are required with CE0 LOW and CE1 HIGH to re-activate the
outputs.
Depth and Width Expansion
The IDT709279/69 features dual chip enables (refer to Truth Table
I)inordertofacilitaterapidandsimpledepthexpansionwithnorequire-
mentsforexternallogic.Figure4illustrateshowtocontrolthevariouschip
enables in order to expand two devices in depth.
The IDT709279/69 can also be used in applications requiring ex-
panded width, as indicated in Figure 4. Since the banks are allocated at
thediscretionoftheuser,theexternalcontrollercanbesetuptodrivethe
input signals for the various devices as required to allow for 32-bit
orwiderapplications.
Figure 4. Depth and Width Expansion with IDT709279/69
NOTE:
1. A14 is for IDT709269.
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