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| 型號(hào)： | ICS1892 |
| 英文描述： | 10Base-T/100Base-TX Integrated PHYceiver |
| 文件頁(yè)數(shù)： | 40/148頁(yè) |
| 文件大小： | 816K |
| 代理商： | ICS1892 |
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ICS1892, Rev. D, 2/26/01
February 26, 2001
40
Chapter 7
Functional Blocks
ICS1892 Data Sheet
2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
For example, if the status bits have a value of 3h and the auto-negotiation process moves into:
State 1, the Auto-Negotiation Progress Monitor does not update the status bits to indicate the new state.
State 5, the Auto-Negotiation Progress Monitor updates the status bits to indicate the new state, State 5.
In this case, the status bits increase in value until either the auto-negotiation process successfully
completes or the STA reads the Auto-Negotiation Progress Monitor status bits.
When the STA reads the status bits, the present state of the auto-negotiation process is automatically
latched into the status bits, regardless of how they compare to the value currently in the latch. However,
the read presents the STA with the previously latched values of the status bits, not the values just latched
into the status register by the read. Therefore, the STA must perform two reads of the status bits to
determine the present state of the Auto-Negotiation Arbitration State Machine.
The first read provides a 'history' of the auto-negotiation process, (that is, the highest state achieved by
the auto-negotiation process). The second read provides the present state of the auto-negotiation
process. This behavior allows management to determine the greatest forward progress made by the
auto-negotiation logic, which is valuable for diagnosing link errors and failures.
Note:
Once the auto-negotiation process completes successfully, the value of all the Progress Monitor
status bits and the Auto-Negotiation Complete bit have a value of logic one. A read operation of the
QuickPoll Register provides a value of logic one for the Auto-Negotiation Complete bit and an octal
value of 111 for the status bits.
However, subsequent reads of the QuickPoll Register also provide a value of logic one for the
Auto-Negotiation Complete bit. The octal value of the status bits are ‘000’, providing the link
remains established. That is, if the link fails, the Auto-Negotiation sublayer is restarted and
subsequent reads provide the value of the Auto-Negotiation Arbitration State Machine.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ICS1892Y | 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y-10 | 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y-14 | 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893AF | 3.3V 10Base-T/100Base-TX Integrated PHYceiverTM |
| ICS1893Y-10 | 3.3V 10Base-T/100Base-TX Integrated PHYceiverTM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ICS1892Y | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y-10 | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver |
| ICS1892Y-14 | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893 | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver |
| ICS1893_09 | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver? |
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