參數(shù)資料
型號: ICS1892
英文描述: 10Base-T/100Base-TX Integrated PHYceiver
文件頁數(shù): 134/148頁
文件大?。?/td> 816K
代理商: ICS1892
ICS1892, Rev. D, 2/26/01
February 26, 2001
134
Chapter 10
DC and AC Operating Conditions
ICS1892 Data Sheet
2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
10.5.11
10M Media Independent Interface: Transmit Latency
Table 10-18
lists the significant time periods for the 10M MII transmit latency. The time periods consist of
timings of signals on the following pins: TXEN, TXCLK, TXD (that is, TXD[3:0]), and TP_TX (that is, the
TP_TXP and TP_TXN pins).
Figure 10-11
shows the timing diagram for the time periods.
Figure 10-11.
10M MII Transmit Latency Timing Diagram
Table 10-18.
10M MII Transmit Latency Timing
Time
Period
Parameter
Conditions
Min.
Typ.
Max.
Units
t1
TXD Sampled to MDI Output of First Bit
10M MII
1.2
2
Bit times
TXCLK
TXEN
TXD
*Manchester
encoding not
shown.
5
5
5
t1
TP_TX*
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ICS1892Y 10Base-T/100Base-TX Integrated PHYceiver
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相關代理商/技術參數(shù)
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ICS1892Y 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver
ICS1892Y-10 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver
ICS1892Y-14 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver
ICS1893 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893_09 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver?