參數(shù)資料
型號(hào): ICS1892
英文描述: 10Base-T/100Base-TX Integrated PHYceiver
文件頁數(shù): 132/148頁
文件大?。?/td> 816K
代理商: ICS1892
ICS1892, Rev. D, 2/26/01
February 26, 2001
132
Chapter 10
DC and AC Operating Conditions
ICS1892 Data Sheet
2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
10.5.9
10M Media Independent Interface: Receive Latency
Table 10-16
lists the significant time periods for the 10M MII timing (which consists of timings of signals on
the following pins: TP_RX (that is, the MII TP_RXP and TP_RXN pins), RXCLK, and RXD.
Figure 10-9
shows the timing diagram for the time periods.
Figure 10-9.
10M MII Receive Latency Timing Diagram
Table 10-16.
Time
Period
Parameter
Conditions
Min.
Typ.
Max.
Units
t1
First Bit of /5/ on TP_RX to /5/D/ on RXD
10M MII
7.7
9
Bit times
TP_RX*
*Manchester
encoding not
shown.
RXCLK
RXD
5
5
D
5
t1
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ICS1892Y 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver
ICS1892Y-10 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver
ICS1892Y-14 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver
ICS1893 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893_09 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver?