參數(shù)資料
型號: ICS1531
英文描述: Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator
中文描述: 三8位MSPS的的A / D轉(zhuǎn)換器與電源同步時鐘發(fā)生器
文件頁數(shù): 58/76頁
文件大小: 529K
代理商: ICS1531
ICS1531 Rev N 12/1/99
December, 1999
58
Chapter 8
Layout and Power Considerations
ICS1531 Data Sheet - Preliminary
Copyright 1999, Integrated Circuit Systems, Inc.
All rights reserved.
Chapter 8
Layout and Power Considerations
8.1
Layout Considerations
8.1.1
General Guidelines for Printed Circuit Board Layout
To lay out a printed circuit board that uses the ICS1531, see
Figure 8-1
and use the following general
guidelines.
Use a printed circuit board with at least the following four planes:
– One power plane
– One ground plane. (No special cutouts required.)
– Two signal planes
Power supply voltages:
– Provide all supply voltages from a common source.
– Ensure that all supply voltages ramp together.
– Bypass each power supply pin with a 0.1-
μ
F capacitor.
When using capacitors for filtering or decoupling, use either tantalum or ceramic capacitors with good
high-frequency characteristics. (Do not use electrolytic capacitors.) Place the capacitors as close as
possible to the ICS1531 pins that are being filtered or decoupled.
Trace widths:
– Use nominal trace widths of approximately 0.020 to 0.025 cm.
– Use a maximum trace width of approximately 0.076 cm.
As
Figure 8-1
indicates, connect the appropriate VDDx and VSSx pins to the appropriate plane, using
multiple surface-etched vias.
Ensure that the area of the printed circuit board where the ICS1531 is placed is free of contaminants.
(Flux and other board-surface debris can degrade the performance of the external loop filter.)
Figure 8-1.
General Decoupling Circuit for ICS1531
0.1
μ
F
0.1
μ
F
10
μ
F
Multiple vias
ICS1531
VDDx
VSSx
Multiple vias
VCC
FB
+
Width from ~
0.025 to
0.076 cm
1.27 cm max
2.54 cm max
Ferrite bead
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ICS1532 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:110 MHZ TRIPLE 8-BIT ADC WITH CLOCK GENERATOR
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ICS1560N-003 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Video/Graphics Clock Generator